Lines Matching full:21
400 CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
402 CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
404 CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD, 21, 0, 0),
406 CLK_CON_GAT_GATE_CLKCMU_CORE_SSS, 21, 0, 0),
410 "mout_clkcmu_apm_bus", CLK_CON_GAT_GATE_CLKCMU_APM_BUS, 21, 0, 0),
414 CLK_CON_GAT_GATE_CLKCMU_AUD, 21, 0, 0),
418 CLK_CON_GAT_GATE_CLKCMU_DPU, 21, 0, 0),
422 CLK_CON_GAT_GATE_CLKCMU_HSI_BUS, 21, 0, 0),
424 CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD, 21, 0, 0),
426 CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD, 21, 0, 0),
431 CLK_CON_GAT_GATE_CLKCMU_IS_BUS, 21, CLK_IS_CRITICAL, 0),
433 CLK_CON_GAT_GATE_CLKCMU_IS_ITP, 21, CLK_IS_CRITICAL, 0),
435 CLK_CON_GAT_GATE_CLKCMU_IS_VRA, 21, CLK_IS_CRITICAL, 0),
437 CLK_CON_GAT_GATE_CLKCMU_IS_GDC, 21, CLK_IS_CRITICAL, 0),
442 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MFC, 21, CLK_IS_CRITICAL, 0),
444 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_M2M, 21, CLK_IS_CRITICAL, 0),
446 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_MCSC, 21, CLK_IS_CRITICAL, 0),
448 CLK_CON_GAT_GATE_CLKCMU_MFCMSCL_JPEG, 21, CLK_IS_CRITICAL, 0),
452 CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
454 CLK_CON_GAT_GATE_CLKCMU_PERI_UART, 21, 0, 0),
456 CLK_CON_GAT_GATE_CLKCMU_PERI_IP, 21, 0, 0),
575 CLK_CON_GAT_CLKCMU_CMGP_BUS, 21, 0, 0),
578 CLK_CON_GAT_GATE_CLKCMU_CHUB_BUS, 21, 0, 0),
580 CLK_CON_GAT_GOUT_APM_APBIF_RTC_PCLK, 21, 0, 0),
582 CLK_CON_GAT_GOUT_APM_APBIF_TOP_RTC_PCLK, 21, 0, 0),
584 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_PCLK, 21, 0, 0),
586 CLK_CON_GAT_GOUT_APM_I3C_APM_PMIC_I_SCLK, 21, 0, 0),
588 CLK_CON_GAT_GOUT_APM_SPEEDY_APM_PCLK, 21, 0, 0),
591 CLK_CON_GAT_GOUT_APM_APBIF_GPIO_ALIVE_PCLK, 21, CLK_IGNORE_UNUSED,
594 CLK_CON_GAT_GOUT_APM_APBIF_PMU_ALIVE_PCLK, 21, 0, 0),
596 CLK_CON_GAT_GOUT_APM_SYSREG_APM_PCLK, 21, 0, 0),
831 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_CA32, 21, 0, 0),
833 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_ASB, 21, 0, 0),
835 CLK_CON_GAT_GOUT_AUD_ABOX_CCLK_DAP, 21, 0, 0),
838 CLK_CON_GAT_GOUT_AUD_ABOX_ACLK, 21, CLK_IGNORE_UNUSED, 0),
840 CLK_CON_GAT_GOUT_AUD_GPIO_PCLK, 21, 0, 0),
842 CLK_CON_GAT_GOUT_AUD_PPMU_ACLK, 21, 0, 0),
844 CLK_CON_GAT_GOUT_AUD_PPMU_PCLK, 21, 0, 0),
846 CLK_CON_GAT_GOUT_AUD_SYSMMU_CLK_S1, 21, 0, 0),
848 CLK_CON_GAT_GOUT_AUD_SYSREG_PCLK, 21, 0, 0),
850 CLK_CON_GAT_GOUT_AUD_WDT_PCLK, 21, 0, 0),
852 CLK_CON_GAT_GOUT_AUD_TZPC_PCLK, 21, 0, 0),
854 CLK_CON_GAT_GOUT_AUD_CODEC_MCLK, 21, 0, 0),
856 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_CNT, 21, 0, 0),
858 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF0, 21, 0, 0),
860 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF1, 21, 0, 0),
862 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF2, 21, 0, 0),
864 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF3, 21, 0, 0),
866 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF4, 21, 0, 0),
868 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF5, 21, 0, 0),
870 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_UAIF6, 21, 0, 0),
872 CLK_CON_GAT_GOUT_AUD_ABOX_BCLK_SPDY, 21, 0, 0),
957 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S0, 21, 0, 0),
960 CLK_CON_GAT_GOUT_CMGP_ADC_PCLK_S1, 21, 0, 0),
964 CLK_CON_GAT_GOUT_CMGP_GPIO_PCLK, 21, CLK_IGNORE_UNUSED, 0),
966 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_IPCLK, 21, 0, 0),
969 CLK_CON_GAT_GOUT_CMGP_USI_CMGP0_PCLK, 21, 0, 0),
971 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_IPCLK, 21, 0, 0),
974 CLK_CON_GAT_GOUT_CMGP_USI_CMGP1_PCLK, 21, 0, 0),
977 CLK_CON_GAT_GOUT_CMGP_SYSREG_CMGP_PCLK, 21, 0, 0),
1049 CLK_CON_GAT_HSI_USB20DRD_TOP_I_RTC_CLK__ALV, 21, 0, 0),
1051 CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50, 21, 0, 0),
1053 CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26, 21, 0, 0),
1056 CLK_CON_GAT_GOUT_HSI_GPIO_HSI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1058 CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK, 21, 0, 0),
1061 CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN, 21, CLK_SET_RATE_PARENT, 0),
1064 CLK_CON_GAT_GOUT_HSI_SYSREG_HSI_PCLK, 21, 0, 0),
1066 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20, 21, 0, 0),
1069 CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, 21, 0, 0),
1160 CLK_CON_GAT_CLK_IS_CMU_IS_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1162 CLK_CON_GAT_GOUT_IS_CSIS0_ACLK, 21, 0, 0),
1164 CLK_CON_GAT_GOUT_IS_CSIS1_ACLK, 21, 0, 0),
1166 CLK_CON_GAT_GOUT_IS_CSIS2_ACLK, 21, 0, 0),
1168 CLK_CON_GAT_GOUT_IS_TZPC_PCLK, 21, 0, 0),
1171 CLK_CON_GAT_GOUT_IS_CLK_CSIS_DMA, 21, 0, 0),
1173 CLK_CON_GAT_GOUT_IS_CLK_GDC, 21, 0, 0),
1175 CLK_CON_GAT_GOUT_IS_CLK_IPP, 21, 0, 0),
1177 CLK_CON_GAT_GOUT_IS_CLK_ITP, 21, 0, 0),
1179 CLK_CON_GAT_GOUT_IS_CLK_MCSC, 21, 0, 0),
1181 CLK_CON_GAT_GOUT_IS_CLK_VRA, 21, 0, 0),
1184 CLK_CON_GAT_GOUT_IS_PPMU_IS0_ACLK, 21, 0, 0),
1186 CLK_CON_GAT_GOUT_IS_PPMU_IS0_PCLK, 21, 0, 0),
1189 CLK_CON_GAT_GOUT_IS_PPMU_IS1_ACLK, 21, 0, 0),
1191 CLK_CON_GAT_GOUT_IS_PPMU_IS1_PCLK, 21, 0, 0),
1194 CLK_CON_GAT_GOUT_IS_SYSMMU_IS0_CLK_S1, 21, 0, 0),
1197 CLK_CON_GAT_GOUT_IS_SYSMMU_IS1_CLK_S1, 21, 0, 0),
1199 CLK_CON_GAT_GOUT_IS_SYSREG_PCLK, 21, 0, 0),
1281 21, CLK_IGNORE_UNUSED, 0),
1284 21, 0, 0),
1287 21, 0, 0),
1290 21, 0, 0),
1293 21, 0, 0),
1296 21, 0, 0),
1299 21, 0, 0),
1302 21, 0, 0),
1305 21, 0, 0),
1308 21, 0, 0),
1429 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_0, 21, 0, 0),
1431 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_1, 21, 0, 0),
1433 CLK_CON_GAT_GATE_CLK_PERI_HSI2C_2, 21, 0, 0),
1435 CLK_CON_GAT_GOUT_PERI_HSI2C_0_IPCLK, 21, 0, 0),
1437 CLK_CON_GAT_GOUT_PERI_HSI2C_0_PCLK, 21, 0, 0),
1439 CLK_CON_GAT_GOUT_PERI_HSI2C_1_IPCLK, 21, 0, 0),
1441 CLK_CON_GAT_GOUT_PERI_HSI2C_1_PCLK, 21, 0, 0),
1443 CLK_CON_GAT_GOUT_PERI_HSI2C_2_IPCLK, 21, 0, 0),
1445 CLK_CON_GAT_GOUT_PERI_HSI2C_2_PCLK, 21, 0, 0),
1447 CLK_CON_GAT_GOUT_PERI_I2C_0_PCLK, 21, 0, 0),
1449 CLK_CON_GAT_GOUT_PERI_I2C_1_PCLK, 21, 0, 0),
1451 CLK_CON_GAT_GOUT_PERI_I2C_2_PCLK, 21, 0, 0),
1453 CLK_CON_GAT_GOUT_PERI_I2C_3_PCLK, 21, 0, 0),
1455 CLK_CON_GAT_GOUT_PERI_I2C_4_PCLK, 21, 0, 0),
1457 CLK_CON_GAT_GOUT_PERI_I2C_5_PCLK, 21, 0, 0),
1459 CLK_CON_GAT_GOUT_PERI_I2C_6_PCLK, 21, 0, 0),
1461 CLK_CON_GAT_GOUT_PERI_MCT_PCLK, 21, 0, 0),
1464 CLK_CON_GAT_GOUT_PERI_PWM_MOTOR_PCLK, 21, 0, 0),
1466 CLK_CON_GAT_GOUT_PERI_SPI_0_IPCLK, 21, 0, 0),
1468 CLK_CON_GAT_GOUT_PERI_SPI_0_PCLK, 21, 0, 0),
1471 CLK_CON_GAT_GOUT_PERI_SYSREG_PERI_PCLK, 21, 0, 0),
1473 CLK_CON_GAT_GOUT_PERI_UART_IPCLK, 21, 0, 0),
1475 CLK_CON_GAT_GOUT_PERI_UART_PCLK, 21, 0, 0),
1477 CLK_CON_GAT_GOUT_PERI_WDT_0_PCLK, 21, 0, 0),
1479 CLK_CON_GAT_GOUT_PERI_WDT_1_PCLK, 21, 0, 0),
1483 CLK_CON_GAT_GOUT_PERI_GPIO_PERI_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1572 CLK_CON_GAT_GOUT_CORE_CCI_550_ACLK, 21, CLK_IS_CRITICAL, 0),
1575 CLK_CON_GAT_GOUT_CORE_GIC_CLK, 21, CLK_IS_CRITICAL, 0),
1577 CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK, 21, 0, 0),
1580 21, CLK_SET_RATE_PARENT, 0),
1582 CLK_CON_GAT_GOUT_CORE_SSS_I_ACLK, 21, 0, 0),
1584 CLK_CON_GAT_GOUT_CORE_SSS_I_PCLK, 21, 0, 0),
1587 CLK_CON_GAT_GOUT_CORE_GPIO_CORE_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1590 CLK_CON_GAT_GOUT_CORE_SYSREG_CORE_PCLK, 21, 0, 0),
1650 CLK_CON_GAT_CLK_DPU_CMU_DPU_PCLK, 21, CLK_IGNORE_UNUSED, 0),
1652 CLK_CON_GAT_GOUT_DPU_ACLK_DECON0, 21, 0, 0),
1654 CLK_CON_GAT_GOUT_DPU_ACLK_DMA, 21, 0, 0),
1656 CLK_CON_GAT_GOUT_DPU_ACLK_DPP, 21, 0, 0),
1658 CLK_CON_GAT_GOUT_DPU_PPMU_ACLK, 21, 0, 0),
1660 CLK_CON_GAT_GOUT_DPU_PPMU_PCLK, 21, 0, 0),
1662 CLK_CON_GAT_GOUT_DPU_SMMU_CLK, 21, 0, 0),
1664 CLK_CON_GAT_GOUT_DPU_SYSREG_PCLK, 21, 0, 0),