Lines Matching +full:exynos4412 +full:- +full:mct
1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/clock/exynos4.h>
13 #include <linux/clk-provider.h>
19 #include "clk-cpu.h"
295 /* Exynos 4210-specific parent groups */
334 /* Exynos 4x12-specific parent groups */
874 GATE(CLK_I2C_HDMI, "i2c-hdmi", "aclk100", GATE_IP_PERIL, 14,
945 GATE(CLK_MCT, "mct", "aclk100", E4210_GATE_IP_PERIR, 13,
985 GATE(CLK_MCT, "mct", "aclk100", E4X12_GATE_IP_PERIR, 13,
1022 np = of_find_compatible_node(NULL, NULL, "samsung,exynos4210-chipid"); in exynos4_get_xom()
1064 { .compatible = "samsung,clock-xxti", .data = (void *)0, },
1065 { .compatible = "samsung,clock-xusbxti", .data = (void *)1, },
1124 PLL_36XX_RATE(24 * MHZ, 196608001, 197, 3, 3, -25690),
1180 /* On Exynos4412 enable it also on core 2 and 3 */ in exynos4x12_core_down_clock()
1255 hws = ctx->clk_data.hws; in exynos4_clk_init()
1364 CLK_OF_DECLARE(exynos4210_clk, "samsung,exynos4210-clock", exynos4210_clk_init);
1370 CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init);