Lines Matching refs:GATE
279 GATE(CLK_WIFI_OSC0, "clk_wifi_osc0", "xin24m", 0,
284 GATE(PCLK_PMU, "pclk_pmu", "pclk_pdpmu", CLK_IGNORE_UNUSED,
287 GATE(PCLK_UART1, "pclk_uart1", "pclk_pdpmu", 0,
297 GATE(SCLK_UART1, "sclk_uart1", "sclk_uart1_mux", 0,
300 GATE(PCLK_I2C0, "pclk_i2c0", "pclk_pdpmu", 0,
305 GATE(PCLK_I2C2, "pclk_i2c2", "pclk_pdpmu", 0,
311 GATE(CLK_CAPTURE_PWM0, "clk_capture_pwm0", "xin24m", 0,
313 GATE(PCLK_PWM0, "pclk_pwm0", "pclk_pdpmu", 0,
318 GATE(CLK_CAPTURE_PWM1, "clk_capture_pwm1", "xin24m", 0,
320 GATE(PCLK_PWM1, "pclk_pwm1", "pclk_pdpmu", 0,
326 GATE(PCLK_SPI0, "pclk_spi0", "pclk_pdpmu", 0,
332 GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_pdpmu", 0,
338 GATE(PCLK_PMUPVTM, "pclk_pmupvtm", "pclk_pdpmu", 0,
340 GATE(CLK_PMUPVTM, "clk_pmupvtm", "xin24m", 0,
342 GATE(CLK_CORE_PMUPVTM, "clk_core_pmupvtm", "xin24m", 0,
348 GATE(0, "xin_osc0_usbphyref_otg", "xin24m", 0,
350 GATE(0, "xin_osc0_usbphyref_host", "xin24m", 0,
362 GATE(0, "xin_osc0_mipiphyref", "xin24m", 0,
367 GATE(CLK_PMU, "clk_pmu", "xin24m", CLK_IGNORE_UNUSED,
370 GATE(PCLK_PMUSGRF, "pclk_pmusgrf", "pclk_pdpmu", CLK_IGNORE_UNUSED,
372 GATE(PCLK_PMUGRF, "pclk_pmugrf", "pclk_pdpmu", CLK_IGNORE_UNUSED,
374 GATE(PCLK_PMUCRU, "pclk_pmucru", "pclk_pdpmu", CLK_IGNORE_UNUSED,
376 GATE(PCLK_CHIPVEROTP, "pclk_chipverotp", "pclk_pdpmu", CLK_IGNORE_UNUSED,
378 GATE(PCLK_PDPMU_NIU, "pclk_pdpmu_niu", "pclk_pdpmu", CLK_IGNORE_UNUSED,
381 GATE(PCLK_SCRKEYGEN, "pclk_scrkeygen", "pclk_pdpmu", 0,
400 GATE(CLK_CORE_CPUPVTM, "clk_core_cpupvtm", "armclk", 0,
402 GATE(PCLK_CPUPVTM, "pclk_cpupvtm", "pclk_dbg", 0,
404 GATE(CLK_CPUPVTM, "clk_cpupvtm", "xin24m", 0,
417 GATE(ACLK_PDBUS, "aclk_pdbus", "aclk_pdbus_pre", CLK_IGNORE_UNUSED,
422 GATE(HCLK_PDBUS, "hclk_pdbus", "hclk_pdbus_pre", CLK_IGNORE_UNUSED,
427 GATE(PCLK_PDBUS, "pclk_pdbus", "pclk_pdbus_pre", CLK_IGNORE_UNUSED,
431 GATE(ACLK_DCF, "aclk_dcf", "hclk_pdbus", CLK_IGNORE_UNUSED,
433 GATE(PCLK_DCF, "pclk_dcf", "pclk_pdbus", CLK_IGNORE_UNUSED,
435 GATE(PCLK_WDT, "pclk_wdt", "pclk_pdbus", 0,
437 GATE(PCLK_MAILBOX, "pclk_mailbox", "pclk_pdbus", 0,
443 GATE(0, "clk_scr1_niu", "clk_scr1", CLK_IGNORE_UNUSED,
445 GATE(CLK_SCR1_CORE, "clk_scr1_core", "clk_scr1", 0,
447 GATE(CLK_SCR1_RTC, "clk_scr1_rtc", "xin24m", 0,
449 GATE(CLK_SCR1_JTAG, "clk_scr1_jtag", "clk_scr1_jtag_io", 0,
452 GATE(PCLK_UART0, "pclk_uart0", "pclk_pdbus", 0,
461 GATE(SCLK_UART0, "sclk_uart0", "sclk_uart0_mux", 0,
463 GATE(PCLK_UART2, "pclk_uart2", "pclk_pdbus", 0,
472 GATE(SCLK_UART2, "sclk_uart2", "sclk_uart2_mux", 0,
474 GATE(PCLK_UART3, "pclk_uart3", "pclk_pdbus", 0,
483 GATE(SCLK_UART3, "sclk_uart3", "sclk_uart3_mux", 0,
485 GATE(PCLK_UART4, "pclk_uart4", "pclk_pdbus", 0,
494 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0,
496 GATE(PCLK_UART5, "pclk_uart5", "pclk_pdbus", 0,
505 GATE(SCLK_UART5, "sclk_uart5", "sclk_uart5_mux", 0,
508 GATE(PCLK_I2C1, "pclk_i2c1", "pclk_pdbus", 0,
513 GATE(PCLK_I2C3, "pclk_i2c3", "pclk_pdbus", 0,
518 GATE(PCLK_I2C4, "pclk_i2c4", "pclk_pdbus", 0,
523 GATE(PCLK_I2C5, "pclk_i2c5", "pclk_pdbus", 0,
529 GATE(PCLK_SPI1, "pclk_spi1", "pclk_pdbus", 0,
535 GATE(CLK_CAPTURE_PWM2, "clk_capture_pwm2", "xin24m", 0,
537 GATE(PCLK_PWM2, "pclk_pwm2", "pclk_pdbus", 0,
543 GATE(PCLK_GPIO1, "pclk_gpio1", "pclk_pdbus", 0,
548 GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_pdbus", 0,
553 GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_pdbus", 0,
558 GATE(PCLK_GPIO4, "pclk_gpio4", "pclk_pdbus", 0,
564 GATE(PCLK_SARADC, "pclk_saradc", "pclk_pdbus", 0,
570 GATE(PCLK_TIMER, "pclk_timer", "pclk_pdbus", 0,
572 GATE(CLK_TIMER0, "clk_timer0", "xin24m", 0,
574 GATE(CLK_TIMER1, "clk_timer1", "xin24m", 0,
576 GATE(CLK_TIMER2, "clk_timer2", "xin24m", 0,
578 GATE(CLK_TIMER3, "clk_timer3", "xin24m", 0,
580 GATE(CLK_TIMER4, "clk_timer4", "xin24m", 0,
582 GATE(CLK_TIMER5, "clk_timer5", "xin24m", 0,
585 GATE(ACLK_SPINLOCK, "aclk_spinlock", "hclk_pdbus", 0,
588 GATE(ACLK_DECOM, "aclk_decom", "aclk_pdbus", 0,
590 GATE(PCLK_DECOM, "pclk_decom", "pclk_pdbus", 0,
596 GATE(PCLK_CAN, "pclk_can", "pclk_pdbus", 0,
605 GATE(PCLK_NPU_TSADC, "pclk_npu_tsadc", "pclk_pdbus", 0,
610 GATE(CLK_NPU_TSADCPHY, "clk_npu_tsadcphy", "clk_npu_tsadc", 0,
612 GATE(PCLK_CPU_TSADC, "pclk_cpu_tsadc", "pclk_pdbus", 0,
617 GATE(CLK_CPU_TSADCPHY, "clk_cpu_tsadcphy", "clk_cpu_tsadc", 0,
628 GATE(HCLK_I2S0, "hclk_i2s0", "hclk_pdaudio", 0,
638 GATE(MCLK_I2S0_TX, "mclk_i2s0_tx", "mclk_i2s0_tx_mux", 0,
648 GATE(MCLK_I2S0_RX, "mclk_i2s0_rx", "mclk_i2s0_rx_mux", 0,
657 GATE(HCLK_I2S1, "hclk_i2s1", "hclk_pdaudio", 0,
667 GATE(MCLK_I2S1, "mclk_i2s1", "mclk_i2s1_mux", 0,
672 GATE(HCLK_I2S2, "hclk_i2s2", "hclk_pdaudio", 0,
682 GATE(MCLK_I2S2, "mclk_i2s2", "mclk_i2s2_mux", 0,
688 GATE(HCLK_PDM, "hclk_pdm", "hclk_pdaudio", 0,
694 GATE(HCLK_AUDPWM, "hclk_audpwm", "hclk_pdaudio", 0,
704 GATE(SCLK_AUDPWM, "sclk_audpwm", "mclk_audpwm_mux", 0,
707 GATE(PCLK_ACDCDIG, "pclk_acdcdig", "hclk_pdaudio", 0,
709 GATE(CLK_ACDCDIG_ADC, "clk_acdcdig_adc", "mclk_i2s0_rx", 0,
711 GATE(CLK_ACDCDIG_DAC, "clk_acdcdig_dac", "mclk_i2s0_tx", 0,
728 GATE(HCLK_PDSDMMC, "hclk_pdsdmmc", "hclk_pdphp", 0,
730 GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_pdsdmmc", 0,
739 GATE(HCLK_PDSDIO, "hclk_pdsdio", "hclk_pdphp", 0,
741 GATE(HCLK_SDIO, "hclk_sdio", "hclk_pdsdio", 0,
750 GATE(HCLK_PDNVM, "hclk_pdnvm", "hclk_pdphp", 0,
752 GATE(HCLK_EMMC, "hclk_emmc", "hclk_pdnvm", 0,
757 GATE(HCLK_NANDC, "hclk_nandc", "hclk_pdnvm", 0,
762 GATE(HCLK_SFC, "hclk_sfc", "hclk_pdnvm", 0,
764 GATE(HCLK_SFCXIP, "hclk_sfcxip", "hclk_pdnvm", 0,
773 GATE(ACLK_PDUSB, "aclk_pdusb", "aclk_pdphp", 0,
775 GATE(HCLK_PDUSB, "hclk_pdusb", "hclk_pdphp", 0,
777 GATE(HCLK_USBHOST, "hclk_usbhost", "hclk_pdusb", 0,
779 GATE(HCLK_USBHOST_ARB, "hclk_usbhost_arb", "hclk_pdusb", 0,
784 GATE(ACLK_USBOTG, "aclk_usbotg", "aclk_pdusb", 0,
786 GATE(CLK_USBOTG_REF, "clk_usbotg_ref", "xin24m", 0,
789 GATE(ACLK_PDGMAC, "aclk_pdgmac", "aclk_pdphp", 0,
794 GATE(ACLK_GMAC, "aclk_gmac", "aclk_pdgmac", 0,
796 GATE(PCLK_GMAC, "pclk_gmac", "pclk_pdgmac", 0,
802 GATE(CLK_GMAC_RGMII_M0, "clk_gmac_rgmii_m0", "clk_gmac_rgmii_clkin_m0", 0,
806 GATE(CLK_GMAC_RGMII_M1, "clk_gmac_rgmii_m1", "clk_gmac_rgmii_clkin_m1", 0,
814 GATE(CLK_GMAC_REF, "clk_gmac_ref", "clk_gmac_src", 0,
817 GATE(CLK_GMAC_TX_SRC, "clk_gmac_tx_src", "clk_gmac_src", 0,
823 GATE(CLK_GMAC_RX_SRC, "clk_gmac_rx_src", "clk_gmac_src", 0,
833 GATE(CLK_GMAC_PTPREF, "clk_gmac_ptpref", "xin24m", 0,
842 GATE(PCLK_PDTOP, "pclk_pdtop", "pclk_pdbus", CLK_IGNORE_UNUSED,
844 GATE(PCLK_DSIPHY, "pclk_dsiphy", "pclk_pdtop", 0,
846 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_pdtop", 0,
848 GATE(PCLK_CSIPHY1, "pclk_csiphy1", "pclk_pdtop", 0,
850 GATE(PCLK_USBPHY_HOST, "pclk_usbphy_host", "pclk_pdtop", 0,
852 GATE(PCLK_USBPHY_OTG, "pclk_usbphy_otg", "pclk_pdtop", 0,
862 GATE(0, "pclk_dbg_daplite", "pclk_dbg", CLK_IGNORE_UNUSED,
864 GATE(0, "clk_a7_jtag", "clk_jtag_ori", CLK_IGNORE_UNUSED,
866 GATE(0, "aclk_core_niu", "aclk_core", CLK_IGNORE_UNUSED,
868 GATE(0, "pclk_dbg_niu", "pclk_dbg", CLK_IGNORE_UNUSED,
874 GATE(0, "aclk_pdbus_hold_niu1", "aclk_pdbus", CLK_IGNORE_UNUSED,
876 GATE(0, "aclk_pdbus_niu1", "aclk_pdbus", CLK_IGNORE_UNUSED,
878 GATE(0, "hclk_pdbus_niu1", "hclk_pdbus", CLK_IGNORE_UNUSED,
880 GATE(0, "pclk_pdbus_niu1", "pclk_pdbus", CLK_IGNORE_UNUSED,
882 GATE(0, "aclk_pdbus_niu2", "aclk_pdbus", CLK_IGNORE_UNUSED,
884 GATE(0, "hclk_pdbus_niu2", "hclk_pdbus", CLK_IGNORE_UNUSED,
886 GATE(0, "aclk_pdbus_niu3", "aclk_pdbus", CLK_IGNORE_UNUSED,
888 GATE(0, "hclk_pdbus_niu3", "hclk_pdbus", CLK_IGNORE_UNUSED,
890 GATE(0, "pclk_grf", "pclk_pdbus", CLK_IGNORE_UNUSED,
892 GATE(0, "pclk_sgrf", "pclk_pdbus", CLK_IGNORE_UNUSED,
894 GATE(0, "aclk_sysram", "hclk_pdbus", CLK_IGNORE_UNUSED,
896 GATE(0, "pclk_intmux", "pclk_pdbus", CLK_IGNORE_UNUSED,
903 GATE(0, "hclk_pdaudio_niu", "hclk_pdaudio", CLK_IGNORE_UNUSED,
905 GATE(0, "pclk_pdaudio_niu", "hclk_pdaudio", CLK_IGNORE_UNUSED,
912 GATE(0, "aclk_pdphpmid", "aclk_pdphp", CLK_IGNORE_UNUSED,
914 GATE(0, "hclk_pdphpmid", "hclk_pdphp", CLK_IGNORE_UNUSED,
916 GATE(0, "aclk_pdphpmid_niu", "aclk_pdphpmid", CLK_IGNORE_UNUSED,
918 GATE(0, "hclk_pdphpmid_niu", "hclk_pdphpmid", CLK_IGNORE_UNUSED,
922 GATE(0, "hclk_pdsdmmc_niu", "hclk_pdsdmmc", CLK_IGNORE_UNUSED,
926 GATE(0, "hclk_pdsdio_niu", "hclk_pdsdio", CLK_IGNORE_UNUSED,
930 GATE(0, "hclk_pdnvm_niu", "hclk_pdnvm", CLK_IGNORE_UNUSED,
934 GATE(0, "aclk_pdusb_niu", "aclk_pdusb", CLK_IGNORE_UNUSED,
936 GATE(0, "hclk_pdusb_niu", "hclk_pdusb", CLK_IGNORE_UNUSED,
940 GATE(0, "aclk_pdgmac_niu", "aclk_pdgmac", CLK_IGNORE_UNUSED,
942 GATE(0, "pclk_pdgmac_niu", "pclk_pdgmac", CLK_IGNORE_UNUSED,
952 GATE(PCLK_PDDDR, "pclk_pdddr", "pclk_pdddr_pre", CLK_IGNORE_UNUSED,
954 GATE(0, "pclk_ddr_msch", "pclk_pdddr", CLK_IGNORE_UNUSED,
962 GATE(0, "clk1x_phy", "clk_ddrphy", CLK_IGNORE_UNUSED,
964 GATE(0, "clk_ddr_msch", "clk_ddrphy", CLK_IGNORE_UNUSED,
966 GATE(0, "pclk_ddr_dfictl", "pclk_pdddr", CLK_IGNORE_UNUSED,
968 GATE(0, "clk_ddr_dfictl", "clk_ddrphy", CLK_IGNORE_UNUSED,
970 GATE(0, "pclk_ddr_standby", "pclk_pdddr", CLK_IGNORE_UNUSED,
972 GATE(0, "clk_ddr_standby", "clk_ddrphy", CLK_IGNORE_UNUSED,
974 GATE(0, "aclk_ddr_split", "clk_ddrphy", CLK_IGNORE_UNUSED,
976 GATE(0, "pclk_ddr_grf", "pclk_pdddr", CLK_IGNORE_UNUSED,
978 GATE(PCLK_DDR_MON, "pclk_ddr_mon", "pclk_pdddr", CLK_IGNORE_UNUSED,
980 GATE(CLK_DDR_MON, "clk_ddr_mon", "clk_ddrphy", CLK_IGNORE_UNUSED,
982 GATE(TMCLK_DDR_MON, "tmclk_ddr_mon", "xin24m", CLK_IGNORE_UNUSED,
988 GATE(0, "pclk_topniu", "pclk_pdtop", CLK_IGNORE_UNUSED,
990 GATE(PCLK_TOPCRU, "pclk_topcru", "pclk_pdtop", CLK_IGNORE_UNUSED,
992 GATE(PCLK_TOPGRF, "pclk_topgrf", "pclk_pdtop", CLK_IGNORE_UNUSED,
994 GATE(PCLK_CPUEMADET, "pclk_cpuemadet", "pclk_pdtop", CLK_IGNORE_UNUSED,
996 GATE(PCLK_DDRPHY, "pclk_ddrphy", "pclk_pdtop", CLK_IGNORE_UNUSED,