Lines Matching refs:zclk

51 	struct cpg_z_clk *zclk = to_z_clk(hw);  in cpg_z_clk_recalc_rate()  local
55 val = readl(zclk->reg) & zclk->mask; in cpg_z_clk_recalc_rate()
56 mult = 32 - (val >> __ffs(zclk->mask)); in cpg_z_clk_recalc_rate()
59 32 * zclk->fixed_div); in cpg_z_clk_recalc_rate()
65 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_determine_rate() local
70 if (rate <= zclk->max_rate) { in cpg_z_clk_determine_rate()
72 prate = zclk->max_rate; in cpg_z_clk_determine_rate()
78 prate * zclk->fixed_div); in cpg_z_clk_determine_rate()
80 prate = req->best_parent_rate / zclk->fixed_div; in cpg_z_clk_determine_rate()
96 struct cpg_z_clk *zclk = to_z_clk(hw); in cpg_z_clk_set_rate() local
100 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, in cpg_z_clk_set_rate()
104 if (readl(zclk->kick_reg) & CPG_FRQCRB_KICK) in cpg_z_clk_set_rate()
107 cpg_reg_modify(zclk->reg, zclk->mask, (32 - mult) << __ffs(zclk->mask)); in cpg_z_clk_set_rate()
113 cpg_reg_modify(zclk->kick_reg, 0, CPG_FRQCRB_KICK); in cpg_z_clk_set_rate()
125 if (!(readl(zclk->kick_reg) & CPG_FRQCRB_KICK)) in cpg_z_clk_set_rate()
147 struct cpg_z_clk *zclk; in cpg_z_clk_register() local
150 zclk = kzalloc(sizeof(*zclk), GFP_KERNEL); in cpg_z_clk_register()
151 if (!zclk) in cpg_z_clk_register()
160 zclk->reg = reg + CPG_FRQCRC; in cpg_z_clk_register()
161 zclk->kick_reg = reg + CPG_FRQCRB; in cpg_z_clk_register()
162 zclk->hw.init = &init; in cpg_z_clk_register()
163 zclk->mask = GENMASK(offset + 4, offset); in cpg_z_clk_register()
164 zclk->fixed_div = div; /* PLLVCO x 1/div x SYS-CPU divider */ in cpg_z_clk_register()
166 clk = clk_register(NULL, &zclk->hw); in cpg_z_clk_register()
168 kfree(zclk); in cpg_z_clk_register()
172 zclk->max_rate = clk_hw_get_rate(clk_hw_get_parent(&zclk->hw)) / in cpg_z_clk_register()
173 zclk->fixed_div; in cpg_z_clk_register()