Lines Matching +full:0 +full:x160
80 DEF_GEN4_Z("z0", R8A779F0_CLK_Z0, CLK_TYPE_GEN4_Z, CLK_PLL2, 2, 0),
116 DEF_GEN4_SDH("sdh0", R8A779F0_CLK_SD0H, CLK_SDSRC, 0x870),
117 DEF_GEN4_SD("sd0", R8A779F0_CLK_SD0, R8A779F0_CLK_SD0H, 0x870),
122 DEF_DIV6P1("mso", R8A779F0_CLK_MSO, CLK_PLL5_DIV4, 0x87c),
178 * 0 0 16 / 1 x200 x150 x200 n/a x200 x134 /15
179 * 0 1 20 / 1 x160 x120 x160 n/a x160 x106 /19
180 * 1 0 Prohibited setting
181 * 1 1 40 / 2 x160 x120 x160 n/a x160 x106 /38
188 { 1, 200, 1, 150, 1, 200, 1, 0, 0, 200, 1, 134, 1, 15, },
189 { 1, 160, 1, 120, 1, 160, 1, 0, 0, 160, 1, 106, 1, 19, },
190 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
191 { 2, 160, 1, 120, 1, 160, 1, 0, 0, 160, 1, 106, 1, 38, },
206 dev_err(dev, "Prohibited setting (cpg_mode=0x%x)\n", cpg_mode); in r8a779f0_cpg_mssr_init()