Lines Matching +full:0 +full:x48
28 .l_reg = 0x4,
29 .m_reg = 0x8,
30 .n_reg = 0xc,
31 .config_reg = 0x14,
32 .mode_reg = 0x0,
33 .status_reg = 0x18,
46 .l = 0xf,
47 .m = 0x91,
48 .n = 0xc7,
49 .vco_val = 0x0,
51 .pre_div_val = 0x0,
53 .post_div_val = 0x0,
65 { P_PXO, 0 },
112 .ns_reg = 0x48,
113 .md_reg = 0x4c,
127 .src_sel_shift = 0,
132 .enable_reg = 0x48,
145 .halt_reg = 0x50,
149 .enable_reg = 0x48,
164 .reg = 0x48,
180 .halt_reg = 0x50,
181 .halt_bit = 0,
184 .enable_reg = 0x48,
204 .reg = 0x48,
229 .ns_reg = 0x54,
230 .md_reg = 0x58,
244 .src_sel_shift = 0,
249 .enable_reg = 0x54,
262 .halt_reg = 0x5c,
263 .halt_bit = 0,
266 .enable_reg = 0x54,
286 .reg = 0x54,
313 .ns_reg = 0xcc,
314 .md_reg = 0xd0,
328 .src_sel_shift = 0,
333 .enable_reg = 0xcc,
346 .halt_reg = 0xd4,
350 .enable_reg = 0xcc,
370 .ns_reg = 0x38,
371 .md_reg = 0x3c,
385 .src_sel_shift = 0,
390 .enable_reg = 0x38,
417 [LCC_PCM_RESET] = { 0x54, 13 },
424 .max_register = 0xfc,
452 regmap_read(regmap, 0x0, &val); in lcc_ipq806x_probe()
456 regmap_write(regmap, 0xc4, 0x1); in lcc_ipq806x_probe()