1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
13 #include <soc/qcom/cmd-db.h>
14 #include <soc/qcom/rpmh.h>
17 #include <dt-bindings/clock/qcom,rpmh.h>
23  * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
24  * @unit: divisor used to convert Hz value to an RPMh msg
25  * @width: multiplier used to convert Hz value to an RPMh msg
37  * struct clk_rpmh - individual rpmh clock data structure
38  * @hw:			handle between common and hardware-specific interfaces
39  * @res_name:		resource name for the rpmh clock
41  * @res_addr:		base address of the rpmh resource within the RPMh
42  * @res_on_val:		rpmh clock enable value
43  * @state:		rpmh clock requested state
44  * @aggr_state:		rpmh clock aggregated state
45  * @last_sent_aggr_state: rpmh clock last aggr state sent to RPMh
46  * @valid_state_mask:	mask to determine the state of the rpmh clock
47  * @unit:		divisor to convert rate to rpmh msg in magnitudes of Khz
49  * @peer:		pointer to the clock rpmh sibling
142 	return (c->last_sent_aggr_state & BIT(state))  in has_state_changed()
143 		!= (c->aggr_state & BIT(state));  in has_state_changed()
150 		return rpmh_write(c->dev, state, cmd, 1);  in clk_rpmh_send()
152 	return rpmh_write_async(c->dev, state, cmd, 1);  in clk_rpmh_send()
163 	cmd.addr = c->res_addr;  in clk_rpmh_send_aggregate_command()
164 	cmd_state = c->aggr_state;  in clk_rpmh_send_aggregate_command()
165 	on_val = c->res_on_val;  in clk_rpmh_send_aggregate_command()
175 				dev_err(c->dev, "set %s state of %s failed: (%d)\n",  in clk_rpmh_send_aggregate_command()
178 					"wake" : "active", c->res_name, ret);  in clk_rpmh_send_aggregate_command()
184 	c->last_sent_aggr_state = c->aggr_state;  in clk_rpmh_send_aggregate_command()
185 	c->peer->last_sent_aggr_state =  c->last_sent_aggr_state;  in clk_rpmh_send_aggregate_command()
198 	c->state = enable ? c->valid_state_mask : 0;  in clk_rpmh_aggregate_state_send_command()
199 	c->aggr_state = c->state | c->peer->state;  in clk_rpmh_aggregate_state_send_command()
200 	c->peer->aggr_state = c->aggr_state;  in clk_rpmh_aggregate_state_send_command()
207 		c->state = 0;  in clk_rpmh_aggregate_state_send_command()
209 		c->state = c->valid_state_mask;  in clk_rpmh_aggregate_state_send_command()
211 	WARN(1, "clk: %s failed to %s\n", c->res_name,  in clk_rpmh_aggregate_state_send_command()
243 	 * RPMh clocks have a fixed rate. Return static rate.  in clk_rpmh_recalc_rate()
245 	return prate / r->div;  in clk_rpmh_recalc_rate()
263 		if (c->aggr_state)  in clk_rpmh_bcm_send_cmd()
264 			cmd_state = c->aggr_state;  in clk_rpmh_bcm_send_cmd()
269 	if (c->last_sent_aggr_state != cmd_state) {  in clk_rpmh_bcm_send_cmd()
270 		cmd.addr = c->res_addr;  in clk_rpmh_bcm_send_cmd()
274 		 * Send only an active only state request. RPMh continues to  in clk_rpmh_bcm_send_cmd()
280 			dev_err(c->dev, "set active state of %s failed: (%d)\n",  in clk_rpmh_bcm_send_cmd()
281 				c->res_name, ret);  in clk_rpmh_bcm_send_cmd()
283 			c->last_sent_aggr_state = cmd_state;  in clk_rpmh_bcm_send_cmd()
311 	c->aggr_state = rate / c->unit;  in clk_rpmh_bcm_set_rate()
313 	 * Since any non-zero value sent to hw would result in enabling the  in clk_rpmh_bcm_set_rate()
333 	return c->aggr_state * c->unit;  in clk_rpmh_bcm_recalc_rate()
344 /* Resource name must match resource id present in cmd-db */
345 DEFINE_CLK_RPMH_ARC(sdm845, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2);
346 DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2);
347 DEFINE_CLK_RPMH_VRM(sdm845, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2);
348 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk1, rf_clk1_ao, "rfclka1", 1);
349 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1);
350 DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1);
356 DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0");
357 DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0");
553 /* Resource name must match resource id present in cmd-db */
650 	struct clk_rpmh_desc *rpmh = data;  in of_clk_rpmh_hw_get()  local
651 	unsigned int idx = clkspec->args[0];  in of_clk_rpmh_hw_get()
653 	if (idx >= rpmh->num_clks) {  in of_clk_rpmh_hw_get()
655 		return ERR_PTR(-EINVAL);  in of_clk_rpmh_hw_get()
658 	return rpmh->clks[idx];  in of_clk_rpmh_hw_get()
668 	desc = of_device_get_match_data(&pdev->dev);  in clk_rpmh_probe()
670 		return -ENODEV;  in clk_rpmh_probe()
672 	hw_clks = desc->clks;  in clk_rpmh_probe()
674 	for (i = 0; i < desc->num_clks; i++) {  in clk_rpmh_probe()
683 		name = hw_clks[i]->init->name;  in clk_rpmh_probe()
686 		res_addr = cmd_db_read_addr(rpmh_clk->res_name);  in clk_rpmh_probe()
688 			dev_err(&pdev->dev, "missing RPMh resource address for %s\n",  in clk_rpmh_probe()
689 				rpmh_clk->res_name);  in clk_rpmh_probe()
690 			return -ENODEV;  in clk_rpmh_probe()
693 		data = cmd_db_read_aux_data(rpmh_clk->res_name, &aux_data_len);  in clk_rpmh_probe()
696 			dev_err(&pdev->dev,  in clk_rpmh_probe()
697 				"error reading RPMh aux data for %s (%d)\n",  in clk_rpmh_probe()
698 				rpmh_clk->res_name, ret);  in clk_rpmh_probe()
704 			rpmh_clk->unit = le32_to_cpu(data->unit) * 1000ULL;  in clk_rpmh_probe()
706 		rpmh_clk->res_addr += res_addr;  in clk_rpmh_probe()
707 		rpmh_clk->dev = &pdev->dev;  in clk_rpmh_probe()
709 		ret = devm_clk_hw_register(&pdev->dev, hw_clks[i]);  in clk_rpmh_probe()
711 			dev_err(&pdev->dev, "failed to register %s\n", name);  in clk_rpmh_probe()
717 	ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_rpmh_hw_get,  in clk_rpmh_probe()
720 		dev_err(&pdev->dev, "Failed to add clock provider\n");  in clk_rpmh_probe()
724 	dev_dbg(&pdev->dev, "Registered RPMh clocks\n");  in clk_rpmh_probe()
730 	{ .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
731 	{ .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
732 	{ .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp},
733 	{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
734 	{ .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670},
735 	{ .compatible = "qcom,sdx55-rpmh-clk",  .data = &clk_rpmh_sdx55},
736 	{ .compatible = "qcom,sdx65-rpmh-clk",  .data = &clk_rpmh_sdx65},
737 	{ .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
738 	{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
739 	{ .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
740 	{ .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
741 	{ .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
742 	{ .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
750 		.name	= "clk-rpmh",
767 MODULE_DESCRIPTION("QCOM RPMh Clock Driver");