Lines Matching +full:vco +full:- +full:offset

1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/clk-provider.h>
8 #include "clk-regmap.h"
56 #define VCO(a, b, c) { \  macro
63  * struct clk_alpha_pll - phase locked loop (PLL)
64  * @offset: base address of registers
65  * @vco_table: array of VCO settings
70 	u32 offset;  member
85  * struct clk_alpha_pll_postdiv - phase locked loop (PLL) post-divider
86  * @offset: base address of registers
88  * @width: width of post-divider
89  * @post_div_shift: shift to differentiate between odd & even post-divider
90  * @post_div_table: table with PLL odd and even post-divider settings
91  * @num_post_div: Number of PLL post-divider settings
96 	u32 offset;  member