10 #include <linux/regmap.h>
258 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
263 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
302 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,  in clk_alpha_pll_write_config()  argument
306 		regmap_write(regmap, reg, val);  in clk_alpha_pll_write_config()
309 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
314 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
315 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
316 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
319 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
323 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
343 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
346 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
356 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
365 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
381 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
386 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
397 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
411 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
435 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
451 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
463 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
472 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
486 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
497 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
504 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
562 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
564 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
566 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
568 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
588 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
591 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
609 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
653 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
659 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
661 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
664 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
669 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
761 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
762 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
765 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
816 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
819 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
832 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
838 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
839 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
842 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
845 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
860 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
865 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);  in trion_pll_is_enabled()
866 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in trion_pll_is_enabled()
877 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
883 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
887 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
900 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
907 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
913 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
920 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
924 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
935 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
940 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
946 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
947 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
956 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
957 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
1015 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1062 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1083 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1101 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1106 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1107 	clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1108 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1110 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1112 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1114 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1116 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1118 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1124 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1128 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,  in clk_fabia_pll_configure()
1131 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1134 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1143 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1145 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1157 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1165 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1169 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1173 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1178 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1186 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1191 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1200 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1202 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1212 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1217 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1222 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1231 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1232 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1270 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1271 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1288 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1317 	regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1358 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1379 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1382 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1412 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1423 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1454 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1469 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1485  * @regmap: register map
1488 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1495 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_trion_pll_configure()
1500 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1501 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1502 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1503 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1505 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1507 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1509 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1511 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1513 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1515 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1517 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1519 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1522 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1526 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1529 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1532 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1547 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);  in __alpha_pll_trion_prepare()
1584 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __alpha_pll_trion_set_rate()
1585 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __alpha_pll_trion_set_rate()
1588 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);  in __alpha_pll_trion_set_rate()
1594 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in __alpha_pll_trion_set_rate()
1601 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);  in __alpha_pll_trion_set_rate()
1651 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_agera_pll_configure()  argument
1654 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_agera_pll_configure()
1655 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_agera_pll_configure()
1656 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1658 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_agera_pll_configure()
1660 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_agera_pll_configure()
1662 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_agera_pll_configure()
1664 	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),  in clk_agera_pll_configure()
1684 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_agera_set_rate()
1685 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_agera_set_rate()
1709 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1722 	ret = trion_pll_is_enabled(pll, pll->clkr.regmap);  in alpha_pll_lucid_5lpe_enable()
1726 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_5lpe_enable()
1730 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_5lpe_enable()
1737 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1742 	return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_5lpe_enable()
1751 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1762 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_lucid_5lpe_disable()
1767 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
1772 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_lucid_5lpe_disable()
1787 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_lucid_5lpe_prepare()
1817 	struct regmap *regmap = pll->clkr.regmap;  in __clk_lucid_pll_postdiv_set_rate()  local
1825 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in __clk_lucid_pll_postdiv_set_rate()
1847 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_lucid_pll_postdiv_set_rate()
1884 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_zonda_pll_configure()  argument
1887 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_zonda_pll_configure()
1888 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_zonda_pll_configure()
1889 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_zonda_pll_configure()
1890 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_zonda_pll_configure()
1891 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_zonda_pll_configure()
1892 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
1893 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_zonda_pll_configure()
1894 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_zonda_pll_configure()
1895 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_zonda_pll_configure()
1896 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_zonda_pll_configure()
1897 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_zonda_pll_configure()
1899 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);  in clk_zonda_pll_configure()
1902 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_configure()
1905 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_zonda_pll_configure()
1908 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_configure()
1915 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_enable()  local
1919 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_enable()
1930 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_zonda_pll_enable()
1938 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_enable()
1941 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_zonda_pll_enable()
1943 	regmap_read(regmap, PLL_TEST_CTL(pll), &val);  in clk_zonda_pll_enable()
1954 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
1957 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_zonda_pll_enable()
1965 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_disable()  local
1968 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_disable()
1977 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_disable()
1980 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
1983 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);  in clk_zonda_pll_disable()
1986 	regmap_write(regmap, PLL_OPMODE(pll), 0x0);  in clk_zonda_pll_disable()
2005 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_zonda_pll_set_rate()
2006 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_zonda_pll_set_rate()
2012 	regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);  in clk_zonda_pll_set_rate()
2037 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_evo_pll_configure()  argument
2043 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_evo_pll_configure()
2044 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_evo_pll_configure()
2045 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_evo_pll_configure()
2046 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2047 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2048 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_evo_pll_configure()
2049 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2050 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_evo_pll_configure()
2051 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2052 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2055 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_evo_pll_configure()
2058 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_evo_pll_configure()
2059 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_evo_pll_configure()
2066 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_enable()  local
2070 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_evo_enable()
2083 	ret = trion_pll_is_enabled(pll, regmap);  in alpha_pll_lucid_evo_enable()
2091 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_evo_enable()
2096 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_evo_enable()
2103 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_evo_enable()
2108 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_evo_enable()
2120 	struct regmap *regmap = pll->clkr.regmap;  in _alpha_pll_lucid_evo_disable()  local
2124 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in _alpha_pll_lucid_evo_disable()
2135 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in _alpha_pll_lucid_evo_disable()
2140 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in _alpha_pll_lucid_evo_disable()
2145 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in _alpha_pll_lucid_evo_disable()
2148 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);  in _alpha_pll_lucid_evo_disable()
2159 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in _alpha_pll_lucid_evo_prepare()
2200 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_recalc_rate()  local
2203 	regmap_read(regmap, PLL_L_VAL(pll), &l);  in alpha_pll_lucid_evo_recalc_rate()
2205 	regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);  in alpha_pll_lucid_evo_recalc_rate()
2254 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_rivian_evo_pll_configure()  argument
2257 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_rivian_evo_pll_configure()
2258 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2259 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_rivian_evo_pll_configure()
2260 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_rivian_evo_pll_configure()
2261 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2262 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_rivian_evo_pll_configure()
2263 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_rivian_evo_pll_configure()
2264 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2266 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_rivian_evo_pll_configure()
2268 	regmap_update_bits(regmap, PLL_MODE(pll),  in clk_rivian_evo_pll_configure()
2280 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_rivian_evo_pll_recalc_rate()