Lines Matching +full:2 +full:mhz
28 * 4 = 600 MHz
29 * 6 = 800 MHz
30 * 7 = 1000 MHz
31 * 9 = 1200 MHz
32 * 12 = 1500 MHz
33 * 13 = 1600 MHz
34 * 14 = 1800 MHz
35 * 15 = 2000 MHz
39 * 1 = (1/2) * CPU
45 * 2 = (1/2) * CPU
48 * 7 = (2/9) * CPU
53 * SAR0[4:2] : Kirkwood 6180 cpu/l2/ddr clock configuration (6180 only)
54 * 5 = [CPU = 600 MHz, L2 = (1/2) * CPU, DDR = 200 MHz = (1/3) * CPU]
55 * 6 = [CPU = 800 MHz, L2 = (1/2) * CPU, DDR = 200 MHz = (1/4) * CPU]
56 * 7 = [CPU = 1000 MHz, L2 = (1/2) * CPU, DDR = 200 MHz = (1/5) * CPU]
60 * 0 = 200 MHz
61 * 1 = 166 MHz
74 #define SAR_MV88F6180_CLK 2
114 static const int kirkwood_cpu_l2_ratios[8][2] __initconst = {
115 { 0, 1 }, { 1, 2 }, { 0, 1 }, { 1, 3 },
119 static const int kirkwood_cpu_ddr_ratios[16][2] __initconst = {
120 { 0, 1 }, { 0, 1 }, { 1, 2 }, { 0, 1 },
121 { 1, 3 }, { 0, 1 }, { 1, 4 }, { 2, 9 },
161 static const int mv88f6180_cpu_ddr_ratios[8][2] __initconst = {
172 /* mv88f6180 has a fixed 1:2 CPU-to-L2 ratio */ in mv88f6180_get_clk_ratio()
174 *div = 2; in mv88f6180_get_clk_ratio()
223 { "pex0", NULL, 2, 0 },