Lines Matching +full:mmp2 +full:- +full:clock

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MMP PLL clock rate calculation
8 #include <linux/clk-provider.h>
34 val = readl_relaxed(pll->enable_reg); in mmp_clk_pll_is_enabled()
35 if ((val & pll->enable) == pll->enable) in mmp_clk_pll_is_enabled()
38 /* Some PLLs, if not software controlled, output default clock. */ in mmp_clk_pll_is_enabled()
39 if (pll->default_rate > 0) in mmp_clk_pll_is_enabled()
53 val = readl_relaxed(pll->enable_reg); in mmp_clk_pll_recalc_rate()
54 if ((val & pll->enable) != pll->enable) in mmp_clk_pll_recalc_rate()
55 return pll->default_rate; in mmp_clk_pll_recalc_rate()
57 if (pll->reg) { in mmp_clk_pll_recalc_rate()
58 val = readl_relaxed(pll->reg); in mmp_clk_pll_recalc_rate()
59 fbdiv = (val >> pll->shift) & 0x1ff; in mmp_clk_pll_recalc_rate()
60 refdiv = (val >> (pll->shift + 9)) & 0x1f; in mmp_clk_pll_recalc_rate()
66 if (pll->postdiv_reg) { in mmp_clk_pll_recalc_rate()
67 /* MMP3 clock rate calculation */ in mmp_clk_pll_recalc_rate()
70 val = readl_relaxed(pll->postdiv_reg); in mmp_clk_pll_recalc_rate()
71 postdiv = (val >> pll->postdiv_shift) & 0x7; in mmp_clk_pll_recalc_rate()
73 rate = pll->input_rate; in mmp_clk_pll_recalc_rate()
78 /* MMP2 clock rate calculation */ in mmp_clk_pll_recalc_rate()
113 return ERR_PTR(-ENOMEM); in mmp_clk_register_pll()
121 pll->default_rate = default_rate; in mmp_clk_register_pll()
122 pll->enable_reg = enable_reg; in mmp_clk_register_pll()
123 pll->enable = enable; in mmp_clk_register_pll()
124 pll->reg = reg; in mmp_clk_register_pll()
125 pll->shift = shift; in mmp_clk_register_pll()
127 pll->input_rate = input_rate; in mmp_clk_register_pll()
128 pll->postdiv_reg = postdiv_reg; in mmp_clk_register_pll()
129 pll->postdiv_shift = postdiv_shift; in mmp_clk_register_pll()
131 pll->hw.init = &init; in mmp_clk_register_pll()
133 clk = clk_register(NULL, &pll->hw); in mmp_clk_register_pll()
163 pr_err("%s: failed to register clock %s\n", in mmp_register_pll_clks()
168 unit->clk_table[clks[i].id] = clk; in mmp_register_pll_clks()