Lines Matching +full:mmp2 +full:- +full:clock

1 // SPDX-License-Identifier: GPL-2.0-only
3  * pxa1928 clock framework source file
8  * Based on drivers/clk/mmp/clk-of-mmp2.c:
18 #include <dt-bindings/clock/marvell,pxa1928.h>
68 	struct mmp_clk_unit *unit = &pxa_unit->unit;  in pxa1928_pll_init()
78 				pxa_unit->mpmu_base + MPMU_UART_PLL,  in pxa1928_pll_init()
129 	struct mmp_clk_unit *unit = &pxa_unit->unit;  in pxa1928_apb_periph_clk_init()
131 	mmp_register_mux_clks(unit, apbc_mux_clks, pxa_unit->apbc_base,  in pxa1928_apb_periph_clk_init()
134 	mmp_register_gate_clks(unit, apbc_gate_clks, pxa_unit->apbc_base,  in pxa1928_apb_periph_clk_init()
168 	struct mmp_clk_unit *unit = &pxa_unit->unit;  in pxa1928_axi_periph_clk_init()
170 	mmp_register_mux_clks(unit, apmu_mux_clks, pxa_unit->apmu_base,  in pxa1928_axi_periph_clk_init()
173 	mmp_register_div_clks(unit, apmu_div_clks, pxa_unit->apmu_base,  in pxa1928_axi_periph_clk_init()
176 	mmp_register_gate_clks(unit, apmu_gate_clks, pxa_unit->apmu_base,  in pxa1928_axi_periph_clk_init()
195 			pxa_unit->apbc_base + apbc_gate_clks[i].offset;  in pxa1928_clk_reset_init()
212 	pxa_unit->mpmu_base = of_iomap(np, 0);  in pxa1928_mpmu_clk_init()
213 	if (!pxa_unit->mpmu_base) {  in pxa1928_mpmu_clk_init()
221 CLK_OF_DECLARE(pxa1928_mpmu_clk, "marvell,pxa1928-mpmu", pxa1928_mpmu_clk_init);
231 	pxa_unit->apmu_base = of_iomap(np, 0);  in pxa1928_apmu_clk_init()
232 	if (!pxa_unit->apmu_base) {  in pxa1928_apmu_clk_init()
238 	mmp_clk_init(np, &pxa_unit->unit, PXA1928_APMU_NR_CLKS);  in pxa1928_apmu_clk_init()
242 CLK_OF_DECLARE(pxa1928_apmu_clk, "marvell,pxa1928-apmu", pxa1928_apmu_clk_init);
252 	pxa_unit->apbc_base = of_iomap(np, 0);  in pxa1928_apbc_clk_init()
253 	if (!pxa_unit->apbc_base) {  in pxa1928_apbc_clk_init()
259 	mmp_clk_init(np, &pxa_unit->unit, PXA1928_APBC_NR_CLKS);  in pxa1928_apbc_clk_init()
264 CLK_OF_DECLARE(pxa1928_apbc_clk, "marvell,pxa1928-apbc", pxa1928_apbc_clk_init);