1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
16 #include "clk-pll.h"
37  * a divider in the PLL feedback loop which consists of 7 bits for the integer
39  * have a 3 bit power-of-two post divider.
62 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_is_prepared()  local
64 	return (readl(pll->en_addr) & BIT(pll->data->pll_en_bit)) != 0;  in mtk_pll_is_prepared()
67 static unsigned long __mtk_pll_recalc_rate(struct mtk_clk_pll *pll, u32 fin,  in __mtk_pll_recalc_rate()  argument
70 	int pcwbits = pll->data->pcwbits;  in __mtk_pll_recalc_rate()
76 	/* The fractional part of the PLL divider. */  in __mtk_pll_recalc_rate()
77 	ibits = pll->data->pcwibits ? pll->data->pcwibits : INTEGER_BITS;  in __mtk_pll_recalc_rate()
79 		pcwfbits = pcwbits - ibits;  in __mtk_pll_recalc_rate()
83 	if (pcwfbits && (vco & GENMASK(pcwfbits - 1, 0)))  in __mtk_pll_recalc_rate()
91 	return ((unsigned long)vco + postdiv - 1) / postdiv;  in __mtk_pll_recalc_rate()
94 static void __mtk_pll_tuner_enable(struct mtk_clk_pll *pll)  in __mtk_pll_tuner_enable()  argument
98 	if (pll->tuner_en_addr) {  in __mtk_pll_tuner_enable()
99 		r = readl(pll->tuner_en_addr) | BIT(pll->data->tuner_en_bit);  in __mtk_pll_tuner_enable()
100 		writel(r, pll->tuner_en_addr);  in __mtk_pll_tuner_enable()
101 	} else if (pll->tuner_addr) {  in __mtk_pll_tuner_enable()
102 		r = readl(pll->tuner_addr) | AUDPLL_TUNER_EN;  in __mtk_pll_tuner_enable()
103 		writel(r, pll->tuner_addr);  in __mtk_pll_tuner_enable()
107 static void __mtk_pll_tuner_disable(struct mtk_clk_pll *pll)  in __mtk_pll_tuner_disable()  argument
111 	if (pll->tuner_en_addr) {  in __mtk_pll_tuner_disable()
112 		r = readl(pll->tuner_en_addr) & ~BIT(pll->data->tuner_en_bit);  in __mtk_pll_tuner_disable()
113 		writel(r, pll->tuner_en_addr);  in __mtk_pll_tuner_disable()
114 	} else if (pll->tuner_addr) {  in __mtk_pll_tuner_disable()
115 		r = readl(pll->tuner_addr) & ~AUDPLL_TUNER_EN;  in __mtk_pll_tuner_disable()
116 		writel(r, pll->tuner_addr);  in __mtk_pll_tuner_disable()
120 static void mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw,  in mtk_pll_set_rate_regs()  argument
126 	__mtk_pll_tuner_disable(pll);  in mtk_pll_set_rate_regs()
129 	val = readl(pll->pd_addr);  in mtk_pll_set_rate_regs()
130 	val &= ~(POSTDIV_MASK << pll->data->pd_shift);  in mtk_pll_set_rate_regs()
131 	val |= (ffs(postdiv) - 1) << pll->data->pd_shift;  in mtk_pll_set_rate_regs()
134 	if (pll->pd_addr != pll->pcw_addr) {  in mtk_pll_set_rate_regs()
135 		writel(val, pll->pd_addr);  in mtk_pll_set_rate_regs()
136 		val = readl(pll->pcw_addr);  in mtk_pll_set_rate_regs()
140 	val &= ~GENMASK(pll->data->pcw_shift + pll->data->pcwbits - 1,  in mtk_pll_set_rate_regs()
141 			pll->data->pcw_shift);  in mtk_pll_set_rate_regs()
142 	val |= pcw << pll->data->pcw_shift;  in mtk_pll_set_rate_regs()
143 	writel(val, pll->pcw_addr);  in mtk_pll_set_rate_regs()
144 	chg = readl(pll->pcw_chg_addr) | PCW_CHG_MASK;  in mtk_pll_set_rate_regs()
145 	writel(chg, pll->pcw_chg_addr);  in mtk_pll_set_rate_regs()
146 	if (pll->tuner_addr)  in mtk_pll_set_rate_regs()
147 		writel(val + 1, pll->tuner_addr);  in mtk_pll_set_rate_regs()
150 	__mtk_pll_tuner_enable(pll);  in mtk_pll_set_rate_regs()
156  * mtk_pll_calc_values - calculate good values for a given input frequency.
157  * @pll:	The pll
164 static void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv,  in mtk_pll_calc_values()  argument
167 	unsigned long fmin = pll->data->fmin ? pll->data->fmin : (1000 * MHZ);  in mtk_pll_calc_values()
168 	const struct mtk_pll_div_table *div_table = pll->data->div_table;  in mtk_pll_calc_values()
173 	if (freq > pll->data->fmax)  in mtk_pll_calc_values()
174 		freq = pll->data->fmax;  in mtk_pll_calc_values()
194 	ibits = pll->data->pcwibits ? pll->data->pcwibits : INTEGER_BITS;  in mtk_pll_calc_values()
195 	_pcw = ((u64)freq << val) << (pll->data->pcwbits - ibits);  in mtk_pll_calc_values()
204 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_set_rate()  local
208 	mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate);  in mtk_pll_set_rate()
209 	mtk_pll_set_rate_regs(pll, pcw, postdiv);  in mtk_pll_set_rate()
217 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_recalc_rate()  local
221 	postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK;  in mtk_pll_recalc_rate()
224 	pcw = readl(pll->pcw_addr) >> pll->data->pcw_shift;  in mtk_pll_recalc_rate()
225 	pcw &= GENMASK(pll->data->pcwbits - 1, 0);  in mtk_pll_recalc_rate()
227 	return __mtk_pll_recalc_rate(pll, parent_rate, pcw, postdiv);  in mtk_pll_recalc_rate()
233 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_round_rate()  local
237 	mtk_pll_calc_values(pll, &pcw, &postdiv, rate, *prate);  in mtk_pll_round_rate()
239 	return __mtk_pll_recalc_rate(pll, *prate, pcw, postdiv);  in mtk_pll_round_rate()
244 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_prepare()  local
247 	r = readl(pll->pwr_addr) | CON0_PWR_ON;  in mtk_pll_prepare()
248 	writel(r, pll->pwr_addr);  in mtk_pll_prepare()
251 	r = readl(pll->pwr_addr) & ~CON0_ISO_EN;  in mtk_pll_prepare()
252 	writel(r, pll->pwr_addr);  in mtk_pll_prepare()
255 	r = readl(pll->en_addr) | BIT(pll->data->pll_en_bit);  in mtk_pll_prepare()
256 	writel(r, pll->en_addr);  in mtk_pll_prepare()
258 	if (pll->data->en_mask) {  in mtk_pll_prepare()
259 		r = readl(pll->base_addr + REG_CON0) | pll->data->en_mask;  in mtk_pll_prepare()
260 		writel(r, pll->base_addr + REG_CON0);  in mtk_pll_prepare()
263 	__mtk_pll_tuner_enable(pll);  in mtk_pll_prepare()
267 	if (pll->data->flags & HAVE_RST_BAR) {  in mtk_pll_prepare()
268 		r = readl(pll->base_addr + REG_CON0);  in mtk_pll_prepare()
269 		r |= pll->data->rst_bar_mask;  in mtk_pll_prepare()
270 		writel(r, pll->base_addr + REG_CON0);  in mtk_pll_prepare()
278 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_pll_unprepare()  local
281 	if (pll->data->flags & HAVE_RST_BAR) {  in mtk_pll_unprepare()
282 		r = readl(pll->base_addr + REG_CON0);  in mtk_pll_unprepare()
283 		r &= ~pll->data->rst_bar_mask;  in mtk_pll_unprepare()
284 		writel(r, pll->base_addr + REG_CON0);  in mtk_pll_unprepare()
287 	__mtk_pll_tuner_disable(pll);  in mtk_pll_unprepare()
289 	if (pll->data->en_mask) {  in mtk_pll_unprepare()
290 		r = readl(pll->base_addr + REG_CON0) & ~pll->data->en_mask;  in mtk_pll_unprepare()
291 		writel(r, pll->base_addr + REG_CON0);  in mtk_pll_unprepare()
294 	r = readl(pll->en_addr) & ~BIT(pll->data->pll_en_bit);  in mtk_pll_unprepare()
295 	writel(r, pll->en_addr);  in mtk_pll_unprepare()
297 	r = readl(pll->pwr_addr) | CON0_ISO_EN;  in mtk_pll_unprepare()
298 	writel(r, pll->pwr_addr);  in mtk_pll_unprepare()
300 	r = readl(pll->pwr_addr) & ~CON0_PWR_ON;  in mtk_pll_unprepare()
301 	writel(r, pll->pwr_addr);  in mtk_pll_unprepare()
316 	struct mtk_clk_pll *pll;  in mtk_clk_register_pll()  local
321 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in mtk_clk_register_pll()
322 	if (!pll)  in mtk_clk_register_pll()
323 		return ERR_PTR(-ENOMEM);  in mtk_clk_register_pll()
325 	pll->base_addr = base + data->reg;  in mtk_clk_register_pll()
326 	pll->pwr_addr = base + data->pwr_reg;  in mtk_clk_register_pll()
327 	pll->pd_addr = base + data->pd_reg;  in mtk_clk_register_pll()
328 	pll->pcw_addr = base + data->pcw_reg;  in mtk_clk_register_pll()
329 	if (data->pcw_chg_reg)  in mtk_clk_register_pll()
330 		pll->pcw_chg_addr = base + data->pcw_chg_reg;  in mtk_clk_register_pll()
332 		pll->pcw_chg_addr = pll->base_addr + REG_CON1;  in mtk_clk_register_pll()
333 	if (data->tuner_reg)  in mtk_clk_register_pll()
334 		pll->tuner_addr = base + data->tuner_reg;  in mtk_clk_register_pll()
335 	if (data->tuner_en_reg || data->tuner_en_bit)  in mtk_clk_register_pll()
336 		pll->tuner_en_addr = base + data->tuner_en_reg;  in mtk_clk_register_pll()
337 	if (data->en_reg)  in mtk_clk_register_pll()
338 		pll->en_addr = base + data->en_reg;  in mtk_clk_register_pll()
340 		pll->en_addr = pll->base_addr + REG_CON0;  in mtk_clk_register_pll()
341 	pll->hw.init = &init;  in mtk_clk_register_pll()
342 	pll->data = data;  in mtk_clk_register_pll()
344 	init.name = data->name;  in mtk_clk_register_pll()
345 	init.flags = (data->flags & PLL_AO) ? CLK_IS_CRITICAL : 0;  in mtk_clk_register_pll()
347 	if (data->parent_name)  in mtk_clk_register_pll()
348 		init.parent_names = &data->parent_name;  in mtk_clk_register_pll()
353 	ret = clk_hw_register(NULL, &pll->hw);  in mtk_clk_register_pll()
356 		kfree(pll);  in mtk_clk_register_pll()
360 	return &pll->hw;  in mtk_clk_register_pll()
365 	struct mtk_clk_pll *pll;  in mtk_clk_unregister_pll()  local
370 	pll = to_mtk_clk_pll(hw);  in mtk_clk_unregister_pll()
373 	kfree(pll);  in mtk_clk_unregister_pll()
387 		return -EINVAL;  in mtk_clk_register_plls()
391 		const struct mtk_pll_data *pll = &plls[i];  in mtk_clk_register_plls()  local
393 		if (!IS_ERR_OR_NULL(clk_data->hws[pll->id])) {  in mtk_clk_register_plls()
395 				node, pll->id);  in mtk_clk_register_plls()
399 		hw = mtk_clk_register_pll(pll, base);  in mtk_clk_register_plls()
402 			pr_err("Failed to register clk %s: %pe\n", pll->name,  in mtk_clk_register_plls()
407 		clk_data->hws[pll->id] = hw;  in mtk_clk_register_plls()
413 	while (--i >= 0) {  in mtk_clk_register_plls()
414 		const struct mtk_pll_data *pll = &plls[i];  in mtk_clk_register_plls()  local
416 		mtk_clk_unregister_pll(clk_data->hws[pll->id]);  in mtk_clk_register_plls()
417 		clk_data->hws[pll->id] = ERR_PTR(-ENOENT);  in mtk_clk_register_plls()
429 	struct mtk_clk_pll *pll = to_mtk_clk_pll(hw);  in mtk_clk_pll_get_base()  local
431 	return pll->base_addr - data->reg;  in mtk_clk_pll_get_base()
443 	for (i = num_plls; i > 0; i--) {  in mtk_clk_unregister_plls()
444 		const struct mtk_pll_data *pll = &plls[i - 1];  in mtk_clk_unregister_plls()  local
446 		if (IS_ERR_OR_NULL(clk_data->hws[pll->id]))  in mtk_clk_unregister_plls()
455 		base = mtk_clk_pll_get_base(clk_data->hws[pll->id], pll);  in mtk_clk_unregister_plls()
457 		mtk_clk_unregister_pll(clk_data->hws[pll->id]);  in mtk_clk_unregister_plls()
458 		clk_data->hws[pll->id] = ERR_PTR(-ENOENT);  in mtk_clk_unregister_plls()