Lines Matching +full:0 +full:x124

296 	.set_ofs = 0x8,
297 	.clr_ofs = 0x8,
298 	.sta_ofs = 0x8,
302 	.set_ofs = 0x40,
303 	.clr_ofs = 0x44,
304 	.sta_ofs = 0x48,
308 	.set_ofs = 0x120,
309 	.clr_ofs = 0x120,
310 	.sta_ofs = 0x120,
314 	.set_ofs = 0x128,
315 	.clr_ofs = 0x128,
316 	.sta_ofs = 0x128,
320 	.set_ofs = 0x8,
321 	.clr_ofs = 0x10,
322 	.sta_ofs = 0x18,
326 	.set_ofs = 0xC,
327 	.clr_ofs = 0x14,
328 	.sta_ofs = 0x1C,
332 	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0,
333 	    PLL_AO, 21, 0x0204, 24, 0, 0x0204, 0),
334 	PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0210, 0x021C, 0,
335 	    HAVE_RST_BAR, 21, 0x0214, 24, 0, 0x0214, 0),
336 	PLL(CLK_APMIXED_UNIV2PLL, "univ2pll", 0x0220, 0x022C, 0,
337 	    HAVE_RST_BAR, 7, 0x0224, 24, 0, 0x0224, 14),
338 	PLL(CLK_APMIXED_ETH1PLL, "eth1pll", 0x0300, 0x0310, 0,
339 	    0, 21, 0x0300, 1, 0, 0x0304, 0),
340 	PLL(CLK_APMIXED_ETH2PLL, "eth2pll", 0x0314, 0x0320, 0,
341 	    0, 21, 0x0314, 1, 0, 0x0318, 0),
342 	PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x0324, 0x0330, 0,
343 	    0, 31, 0x0324, 1, 0, 0x0328, 0),
344 	PLL(CLK_APMIXED_AUD2PLL, "aud2pll", 0x0334, 0x0340, 0,
345 	    0, 31, 0x0334, 1, 0, 0x0338, 0),
346 	PLL(CLK_APMIXED_TRGPLL, "trgpll", 0x0344, 0x0354, 0,
347 	    0, 21, 0x0344, 1, 0, 0x0348, 0),
348 	PLL(CLK_APMIXED_SGMIPLL, "sgmipll", 0x0358, 0x0368, 0,
349 	    0, 21, 0x0358, 1, 0, 0x035C, 0),
357 	GATE_INFRA(CLK_INFRA_DBGCLK_PD, "infra_dbgclk_pd", "axi_sel", 0),
439 	GATE_TOP0(CLK_TOP_APLL1_DIV_PD, "apll1_ck_div_pd", "apll1_ck_div", 0),
451 	GATE_TOP1(CLK_TOP_A1SYS_HP_DIV_PD, "a1sys_div_pd", "a1sys_div", 0),
457 		0x120, 24, 3),
459 		0x120, 28, 3),
461 		0x124, 0, 7),
463 		0x124, 8, 7),
465 		0x124, 16, 7),
467 		0x124, 24, 7),
469 		0x128, 8, 7),
471 		0x128, 24, 7),
511 	    0x000, 2, 2),
517 		 0x040, 0, 3, 7),
519 		 0x040, 8, 1, 15),
521 		 0x040, 16, 1, 23),
523 		 0x040, 24, 3, 31),
527 		 0x050, 0, 2, 7),
529 		 0x050, 8, 1, 15),
531 		 0x050, 16, 4, 23),
533 		 0x050, 24, 3, 31),
537 		 0x060, 0, 1, 7),
539 		 0x060, 8, 3, 15),
541 		 0x060, 16, 3, 23),
543 		 0x060, 24, 3, 31),
547 		 0x070, 0, 3, 7),
549 		 0x070, 8, 3, 15),
551 		 0x070, 16, 2, 23),
553 		 0x070, 24, 2, 31),
557 		 0x080, 0, 2, 7),
559 		 0x080, 8, 2, 15),
561 		 0x080, 16, 3, 23),
563 		 0x080, 24, 2, 31),
567 		 0x090, 0, 2, 7),
569 		 0x090, 8, 3, 15),
571 		 0x090, 16, 2, 23),
573 		 0x090, 24, 2, 31),
577 		 0x0A0, 0, 1, 7),
579 		 0x0A0, 8, 1, 15),
581 		 0x0A0, 16, 1, 23),
583 		 0x0A0, 24, 1, 31),
587 		 0x0B0, 0, 2, 7),
589 		 0x0B0, 8, 2, 15),
591 		 0x0B0, 16, 2, 23),
595 	    0x120, 6, 1),
597 	    0x120, 7, 1),
599 	    0x120, 8, 1),
601 	    0x120, 9, 1),
603 	    0x120, 10, 1),
605 	    0x120, 11, 1),
610 	MUX(CLK_PERIBUS_SEL, "peribus_ck_sel", peribus_ck_parents, 0x05C, 0, 1),
613 static u16 infrasys_rst_ofs[] = { 0x30, };
614 static u16 pericfg_rst_ofs[] = { 0x0, 0x4, };
637 	base = devm_platform_ioremap_resource(pdev, 0);  in mtk_topckgen_init()
684 	mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc[0]);  in mtk_infrasys_init()
686 	return 0;  in mtk_infrasys_init()
717 	base = devm_platform_ioremap_resource(pdev, 0);  in mtk_pericfg_init()
737 	return 0;  in mtk_pericfg_init()