Lines Matching refs:MUX_GATE
743 MUX_GATE(CLK_TOP_MM_SEL, "mm_sel",
746 MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel",
748 MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel",
750 MUX_GATE(CLK_TOP_VENC_SEL, "venc_sel",
752 MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel",
755 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel",
757 MUX_GATE(CLK_TOP_UART_SEL, "uart_sel",
759 MUX_GATE(CLK_TOP_SPI_SEL, "spi_sel",
761 MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel",
764 MUX_GATE(CLK_TOP_USB30_SEL, "usb30_sel",
766 MUX_GATE(CLK_TOP_MSDC50_0_HCLK_SEL, "msdc50_0_h_sel",
768 MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel",
770 MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel",
773 MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel",
775 MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel",
777 MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel",
779 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel",
782 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel",
784 MUX_GATE(CLK_TOP_DPILVDS1_SEL, "dpilvds1_sel",
786 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel",
788 MUX_GATE(CLK_TOP_NR_SEL, "nr_sel",
791 MUX_GATE(CLK_TOP_NFI2X_SEL, "nfi2x_sel",
793 MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel",
795 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel",
797 MUX_GATE(CLK_TOP_AUD_1_SEL, "aud_1_sel",
800 MUX_GATE(CLK_TOP_AUD_2_SEL, "aud_2_sel",
802 MUX_GATE(CLK_TOP_MEM_MFG_IN_AS_SEL, "mem_mfg_sel",
804 MUX_GATE(CLK_TOP_AXI_MFG_IN_AS_SEL, "axi_mfg_sel",
806 MUX_GATE(CLK_TOP_SCAM_SEL, "scam_sel",
809 MUX_GATE(CLK_TOP_NFIECC_SEL, "nfiecc_sel",
811 MUX_GATE(CLK_TOP_PE2_MAC_P0_SEL, "pe2_mac_p0_sel",
813 MUX_GATE(CLK_TOP_PE2_MAC_P1_SEL, "pe2_mac_p1_sel",
815 MUX_GATE(CLK_TOP_DPILVDS_SEL, "dpilvds_sel",
818 MUX_GATE(CLK_TOP_MSDC50_3_HCLK_SEL, "msdc50_3_h_sel",
820 MUX_GATE(CLK_TOP_HDCP_SEL, "hdcp_sel",
822 MUX_GATE(CLK_TOP_HDCP_24M_SEL, "hdcp_24m_sel",
827 MUX_GATE(CLK_TOP_SPINOR_SEL, "spinor_sel",
829 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel",
831 MUX_GATE(CLK_TOP_APLL2_SEL, "apll2_sel",
833 MUX_GATE(CLK_TOP_A1SYS_HP_SEL, "a1sys_hp_sel",
836 MUX_GATE(CLK_TOP_A2SYS_HP_SEL, "a2sys_hp_sel",
838 MUX_GATE(CLK_TOP_ASM_L_SEL, "asm_l_sel",
840 MUX_GATE(CLK_TOP_ASM_M_SEL, "asm_m_sel",
842 MUX_GATE(CLK_TOP_ASM_H_SEL, "asm_h_sel",
845 MUX_GATE(CLK_TOP_I2SO1_SEL, "i2so1_sel",
847 MUX_GATE(CLK_TOP_I2SO2_SEL, "i2so2_sel",
849 MUX_GATE(CLK_TOP_I2SO3_SEL, "i2so3_sel",
851 MUX_GATE(CLK_TOP_TDMO0_SEL, "tdmo0_sel",
854 MUX_GATE(CLK_TOP_TDMO1_SEL, "tdmo1_sel",
856 MUX_GATE(CLK_TOP_I2SI1_SEL, "i2si1_sel",
858 MUX_GATE(CLK_TOP_I2SI2_SEL, "i2si2_sel",
860 MUX_GATE(CLK_TOP_I2SI3_SEL, "i2si3_sel",
863 MUX_GATE(CLK_TOP_ETHER_125M_SEL, "ether_125m_sel",
865 MUX_GATE(CLK_TOP_ETHER_50M_SEL, "ether_50m_sel",
867 MUX_GATE(CLK_TOP_JPGDEC_SEL, "jpgdec_sel",
869 MUX_GATE(CLK_TOP_SPISLV_SEL, "spislv_sel",
872 MUX_GATE(CLK_TOP_ETHER_50M_RMII_SEL, "ether_sel",
874 MUX_GATE(CLK_TOP_CAM2TG_SEL, "cam2tg_sel",
876 MUX_GATE(CLK_TOP_DI_SEL, "di_sel",
878 MUX_GATE(CLK_TOP_TVD_SEL, "tvd_sel",
881 MUX_GATE(CLK_TOP_I2C_SEL, "i2c_sel",
883 MUX_GATE(CLK_TOP_PWM_INFRA_SEL, "pwm_infra_sel",
885 MUX_GATE(CLK_TOP_MSDC0P_AES_SEL, "msdc0p_aes_sel",
887 MUX_GATE(CLK_TOP_CMSYS_SEL, "cmsys_sel",
890 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel",