Lines Matching refs:CGU_CLK_GATE
172 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
189 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE,
209 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
216 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
223 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
230 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
237 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
244 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
251 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
258 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
265 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
289 "i2s", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
297 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX,
308 "ssi0", CGU_CLK_GATE,
313 "ssi1", CGU_CLK_GATE,
318 "ssi2", CGU_CLK_GATE,
323 "pcm0", CGU_CLK_GATE,
328 "pcm1", CGU_CLK_GATE,
333 "dma", CGU_CLK_GATE,
338 "bdma", CGU_CLK_GATE,
343 "i2c0", CGU_CLK_GATE,
348 "i2c1", CGU_CLK_GATE,
353 "i2c2", CGU_CLK_GATE,
358 "uart0", CGU_CLK_GATE,
363 "uart1", CGU_CLK_GATE,
368 "uart2", CGU_CLK_GATE,
373 "uart3", CGU_CLK_GATE,
378 "ipu", CGU_CLK_GATE,
383 "adc", CGU_CLK_GATE,
388 "aic", CGU_CLK_GATE,
393 "aux", CGU_CLK_GATE,
398 "vpu", CGU_CLK_GATE,
403 "mmc0", CGU_CLK_GATE,
408 "mmc1", CGU_CLK_GATE,
413 "mmc2", CGU_CLK_GATE,
418 "usb_phy", CGU_CLK_GATE,