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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5  * Copyright (c) 2013-2015 Imagination Technologies
13 #include <linux/clk-provider.h>
18  * struct ingenic_cgu_pll_info - information about a PLL
33  * @od_shift: the number of bits to shift the post-VCO divider value by (ie.
34  *            the index of the lowest bit of the post-VCO divider value in
36  * @od_bits: the size of the post-VCO divider field in bits
37  * @od_max: the maximum post-VCO divider value
38  * @od_encoding: a pointer to an array mapping post-VCO divider values to
39  *               their encoded values in the PLL control register, or -1 for
43  *              -1 if there is no bypass bit
64  * struct ingenic_cgu_mux_info - information about a clock mux
77  * struct ingenic_cgu_div_info - information about a divider
85  * @ce_bit: the index of the change enable bit within reg, or -1 if there
87  * @busy_bit: the index of the busy bit within reg, or -1 if there isn't one
88  * @stop_bit: the index of the stop bit within reg, or -1 if there isn't one
106  * struct ingenic_cgu_fixdiv_info - information about a fixed divider
114  * struct ingenic_cgu_gate_info - information about a clock gate
128  * struct ingenic_cgu_custom_info - information about a custom (SoC) clock
136  * struct ingenic_cgu_clk_info - information about a clock
141  *           within the clock_info array of the CGU, or -1 in entries
184  * struct ingenic_cgu - data about the CGU
202  * struct ingenic_clk - private data for a clock
203  * @hw: see Documentation/driver-api/clk.rst
205  * @idx: the index of this clock in cgu->clock_info
216  * ingenic_cgu_new() - create a new CGU instance
230  * ingenic_cgu_register_clocks() - Registers the clocks
235  * Return: 0 on success or -errno if unsuccesful.