111 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \  argument
112 	to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
117 #define imx_clk_fixed_factor(name, parent, mult, div) \  argument
118 	to_clk(imx_clk_hw_fixed_factor(name, parent, mult, div))
120 #define imx_clk_divider(name, parent, reg, shift, width) \  argument
121 	to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
123 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \  argument
124 	to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
126 #define imx_clk_gate(name, parent, reg, shift) \  argument
127 	to_clk(imx_clk_hw_gate(name, parent, reg, shift))
129 #define imx_clk_gate_dis(name, parent, reg, shift) \  argument
130 	to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))
132 #define imx_clk_gate2(name, parent, reg, shift) \  argument
133 	to_clk(imx_clk_hw_gate2(name, parent, reg, shift))
135 #define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \  argument
136 	to_clk(__imx_clk_hw_gate2(name, parent, reg, shift, cgr_val, 0, NULL))
138 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \  argument
139 	to_clk(imx_clk_hw_gate2_flags(name, parent, reg, shift, flags))
150 #define imx_clk_pllv1(type, name, parent, base) \  argument
151 	to_clk(imx_clk_hw_pllv1(type, name, parent, base))
153 #define imx_clk_pllv2(name, parent, base) \  argument
154 	to_clk(imx_clk_hw_pllv2(name, parent, base))
159 #define imx_clk_hw_gate(name, parent, reg, shift) \  argument
160 	imx_clk_hw_gate_flags(name, parent, reg, shift, 0)
162 #define imx_clk_hw_gate2(name, parent, reg, shift) \  argument
163 	imx_clk_hw_gate2_flags(name, parent, reg, shift, 0)
165 #define imx_clk_hw_gate_dis(name, parent, reg, shift) \  argument
166 	imx_clk_hw_gate_dis_flags(name, parent, reg, shift, 0)
168 #define imx_clk_hw_gate_dis_flags(name, parent, reg, shift, flags) \  argument
169 	__imx_clk_hw_gate(name, parent, reg, shift, flags, CLK_GATE_SET_TO_DISABLE)
171 #define imx_clk_hw_gate_flags(name, parent, reg, shift, flags) \  argument
172 	__imx_clk_hw_gate(name, parent, reg, shift, flags, 0)
174 #define imx_clk_hw_gate2_flags(name, parent, reg, shift, flags) \  argument
175 	__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, flags, NULL)
177 #define imx_clk_hw_gate2_shared(name, parent, reg, shift, shared_count) \  argument
178 	__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, 0, shared_count)
180 #define imx_clk_hw_gate2_shared2(name, parent, reg, shift, shared_count) \  argument
181 	__imx_clk_hw_gate2(name, parent, reg, shift, 0x3, CLK_OPS_PARENT_ENABLE, shared_count)
183 #define imx_clk_hw_gate3(name, parent, reg, shift) \  argument
184 	imx_clk_hw_gate3_flags(name, parent, reg, shift, 0)
186 #define imx_clk_hw_gate3_flags(name, parent, reg, shift, flags) \  argument
187 	__imx_clk_hw_gate(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE, 0)
189 #define imx_clk_hw_gate4(name, parent, reg, shift) \  argument
190 	imx_clk_hw_gate4_flags(name, parent, reg, shift, 0)
192 #define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \  argument
193 	imx_clk_hw_gate2_flags(name, parent, reg, shift, flags | CLK_OPS_PARENT_ENABLE)
210 #define imx_clk_hw_divider(name, parent, reg, shift, width) \  argument
211 	__imx_clk_hw_divider(name, parent, reg, shift, width, CLK_SET_RATE_PARENT)
213 #define imx_clk_hw_divider2(name, parent, reg, shift, width) \  argument
214 	__imx_clk_hw_divider(name, parent, reg, shift, width, \
217 #define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \  argument
218 	__imx_clk_hw_divider(name, parent, reg, shift, width, flags)
228 		const char *parent, void __iomem *base);
230 struct clk_hw *imx_clk_hw_pllv2(const char *name, const char *parent,
239 				u8 parent, u8 bypass1, u8 bypass2,
294 struct clk_hw *imx_clk_hw_gate_exclusive(const char *name, const char *parent,
323 struct clk_hw *imx_clk_hw_fixup_divider(const char *name, const char *parent,
344 		const char *parent, unsigned int mult, unsigned int div)  in imx_clk_hw_fixed_factor()  argument
346 	return clk_hw_register_fixed_factor(NULL, name, parent,  in imx_clk_hw_fixed_factor()
351 						   const char *parent,  in __imx_clk_hw_divider()  argument
355 	return clk_hw_register_divider(NULL, name, parent, flags,  in __imx_clk_hw_divider()
359 static inline struct clk_hw *__imx_clk_hw_gate(const char *name, const char *parent,  in __imx_clk_hw_gate()  argument
364 	return clk_hw_register_gate(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,  in __imx_clk_hw_gate()
368 static inline struct clk_hw *__imx_clk_hw_gate2(const char *name, const char *parent,  in __imx_clk_hw_gate2()  argument
373 	return clk_hw_register_gate2(NULL, name, parent, flags | CLK_SET_RATE_PARENT, reg,  in __imx_clk_hw_gate2()