1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/clk-provider.h>
19 /* PLL Control Status Register (xPLLCSR) */
24 /* PLL Configuration Register (xPLLCFG) */
30 /* PLL Numerator Register (xPLLNUM) */
34 /* PLL Denominator Register (xPLLDENOM) */
49 /* Valid PLL MULT Table */
56 static inline int clk_pllv4_wait_lock(struct clk_pllv4 *pll)  in clk_pllv4_wait_lock()  argument
60 	return readl_poll_timeout(pll->base  + PLL_CSR_OFFSET,  in clk_pllv4_wait_lock()
66 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_is_prepared()  local
68 	if (readl_relaxed(pll->base) & PLL_EN)  in clk_pllv4_is_prepared()
77 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_recalc_rate()  local
81 	mult = readl_relaxed(pll->base + pll->cfg_offset);  in clk_pllv4_recalc_rate()
85 	mfn = readl_relaxed(pll->base + pll->num_offset);  in clk_pllv4_recalc_rate()
86 	mfd = readl_relaxed(pll->base + pll->denom_offset);  in clk_pllv4_recalc_rate()
120 	temp64 = (u64)(rate - round_rate);  in clk_pllv4_round_rate()
157 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_set_rate()  local
164 		return -EINVAL;  in clk_pllv4_set_rate()
169 	temp64 = (u64)(rate - mult * parent_rate);  in clk_pllv4_set_rate()
174 	val = readl_relaxed(pll->base + pll->cfg_offset);  in clk_pllv4_set_rate()
177 	writel_relaxed(val, pll->base + pll->cfg_offset);  in clk_pllv4_set_rate()
179 	writel_relaxed(mfn, pll->base + pll->num_offset);  in clk_pllv4_set_rate()
180 	writel_relaxed(mfd, pll->base + pll->denom_offset);  in clk_pllv4_set_rate()
188 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_prepare()  local
190 	val = readl_relaxed(pll->base);  in clk_pllv4_prepare()
192 	writel_relaxed(val, pll->base);  in clk_pllv4_prepare()
194 	return clk_pllv4_wait_lock(pll);  in clk_pllv4_prepare()
200 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_unprepare()  local
202 	val = readl_relaxed(pll->base);  in clk_pllv4_unprepare()
204 	writel_relaxed(val, pll->base);  in clk_pllv4_unprepare()
219 	struct clk_pllv4 *pll;  in imx_clk_hw_pllv4()  local
224 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in imx_clk_hw_pllv4()
225 	if (!pll)  in imx_clk_hw_pllv4()
226 		return ERR_PTR(-ENOMEM);  in imx_clk_hw_pllv4()
228 	pll->base = base;  in imx_clk_hw_pllv4()
231 		pll->cfg_offset = IMX8ULP_PLL_CFG_OFFSET;  in imx_clk_hw_pllv4()
232 		pll->num_offset = IMX8ULP_PLL_NUM_OFFSET;  in imx_clk_hw_pllv4()
233 		pll->denom_offset = IMX8ULP_PLL_DENOM_OFFSET;  in imx_clk_hw_pllv4()
235 		pll->cfg_offset = PLL_CFG_OFFSET;  in imx_clk_hw_pllv4()
236 		pll->num_offset = PLL_NUM_OFFSET;  in imx_clk_hw_pllv4()
237 		pll->denom_offset = PLL_DENOM_OFFSET;  in imx_clk_hw_pllv4()
246 	pll->hw.init = &init;  in imx_clk_hw_pllv4()
248 	hw = &pll->hw;  in imx_clk_hw_pllv4()
251 		kfree(pll);  in imx_clk_hw_pllv4()