Lines Matching +full:reg +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/clk-provider.h>
33 static int imx93_clk_composite_wait_ready(struct clk_hw *hw, void __iomem *reg) in imx93_clk_composite_wait_ready() argument
38 ret = readl_poll_timeout_atomic(reg + STAT_OFFSET, val, !(val & BIT(CCM_BUSY_SHIFT)), in imx93_clk_composite_wait_ready()
50 u32 reg; in imx93_clk_composite_gate_endisable() local
52 if (gate->lock) in imx93_clk_composite_gate_endisable()
53 spin_lock_irqsave(gate->lock, flags); in imx93_clk_composite_gate_endisable()
55 reg = readl(gate->reg); in imx93_clk_composite_gate_endisable()
58 reg &= ~BIT(gate->bit_idx); in imx93_clk_composite_gate_endisable()
60 reg |= BIT(gate->bit_idx); in imx93_clk_composite_gate_endisable()
62 writel(reg, gate->reg); in imx93_clk_composite_gate_endisable()
64 imx93_clk_composite_wait_ready(hw, gate->reg); in imx93_clk_composite_gate_endisable()
66 if (gate->lock) in imx93_clk_composite_gate_endisable()
67 spin_unlock_irqrestore(gate->lock, flags); in imx93_clk_composite_gate_endisable()
115 value = divider_get_val(rate, parent_rate, divider->table, divider->width, divider->flags); in imx93_clk_composite_divider_set_rate()
119 if (divider->lock) in imx93_clk_composite_divider_set_rate()
120 spin_lock_irqsave(divider->lock, flags); in imx93_clk_composite_divider_set_rate()
122 val = readl(divider->reg); in imx93_clk_composite_divider_set_rate()
123 val &= ~(clk_div_mask(divider->width) << divider->shift); in imx93_clk_composite_divider_set_rate()
124 val |= (u32)value << divider->shift; in imx93_clk_composite_divider_set_rate()
125 writel(val, divider->reg); in imx93_clk_composite_divider_set_rate()
127 ret = imx93_clk_composite_wait_ready(hw, divider->reg); in imx93_clk_composite_divider_set_rate()
129 if (divider->lock) in imx93_clk_composite_divider_set_rate()
130 spin_unlock_irqrestore(divider->lock, flags); in imx93_clk_composite_divider_set_rate()
149 struct clk_mux *mux = to_clk_mux(hw); in imx93_clk_composite_mux_set_parent() local
150 u32 val = clk_mux_index_to_val(mux->table, mux->flags, index); in imx93_clk_composite_mux_set_parent()
152 u32 reg; in imx93_clk_composite_mux_set_parent() local
155 if (mux->lock) in imx93_clk_composite_mux_set_parent()
156 spin_lock_irqsave(mux->lock, flags); in imx93_clk_composite_mux_set_parent()
158 reg = readl(mux->reg); in imx93_clk_composite_mux_set_parent()
159 reg &= ~(mux->mask << mux->shift); in imx93_clk_composite_mux_set_parent()
160 val = val << mux->shift; in imx93_clk_composite_mux_set_parent()
161 reg |= val; in imx93_clk_composite_mux_set_parent()
162 writel(reg, mux->reg); in imx93_clk_composite_mux_set_parent()
164 ret = imx93_clk_composite_wait_ready(hw, mux->reg); in imx93_clk_composite_mux_set_parent()
166 if (mux->lock) in imx93_clk_composite_mux_set_parent()
167 spin_unlock_irqrestore(mux->lock, flags); in imx93_clk_composite_mux_set_parent()
185 int num_parents, void __iomem *reg, u32 domain_id, in imx93_clk_composite_flags() argument
188 struct clk_hw *hw = ERR_PTR(-ENOMEM), *mux_hw; in imx93_clk_composite_flags()
192 struct clk_mux *mux = NULL; in imx93_clk_composite_flags() local
196 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in imx93_clk_composite_flags()
197 if (!mux) in imx93_clk_composite_flags()
200 mux_hw = &mux->hw; in imx93_clk_composite_flags()
201 mux->reg = reg; in imx93_clk_composite_flags()
202 mux->shift = CCM_MUX_SHIFT; in imx93_clk_composite_flags()
203 mux->mask = CCM_MUX_MASK; in imx93_clk_composite_flags()
204 mux->lock = &imx_ccm_lock; in imx93_clk_composite_flags()
210 div_hw = &div->hw; in imx93_clk_composite_flags()
211 div->reg = reg; in imx93_clk_composite_flags()
212 div->shift = CCM_DIV_SHIFT; in imx93_clk_composite_flags()
213 div->width = CCM_DIV_WIDTH; in imx93_clk_composite_flags()
214 div->lock = &imx_ccm_lock; in imx93_clk_composite_flags()
215 div->flags = CLK_DIVIDER_ROUND_CLOSEST; in imx93_clk_composite_flags()
217 authen = readl(reg + AUTHEN_OFFSET); in imx93_clk_composite_flags()
230 gate_hw = &gate->hw; in imx93_clk_composite_flags()
231 gate->reg = reg; in imx93_clk_composite_flags()
232 gate->bit_idx = CCM_OFF_SHIFT; in imx93_clk_composite_flags()
233 gate->lock = &imx_ccm_lock; in imx93_clk_composite_flags()
234 gate->flags = CLK_GATE_SET_TO_DISABLE; in imx93_clk_composite_flags()
251 kfree(mux); in imx93_clk_composite_flags()