Lines Matching +full:150 +full:m
14 { HIX5HD2_FIXED_1200M, "1200m", NULL, 0, 1200000000, },
15 { HIX5HD2_FIXED_400M, "400m", NULL, 0, 400000000, },
16 { HIX5HD2_FIXED_48M, "48m", NULL, 0, 48000000, },
17 { HIX5HD2_FIXED_24M, "24m", NULL, 0, 24000000, },
18 { HIX5HD2_FIXED_600M, "600m", NULL, 0, 600000000, },
19 { HIX5HD2_FIXED_300M, "300m", NULL, 0, 300000000, },
20 { HIX5HD2_FIXED_75M, "75m", NULL, 0, 75000000, },
21 { HIX5HD2_FIXED_200M, "200m", NULL, 0, 200000000, },
22 { HIX5HD2_FIXED_100M, "100m", NULL, 0, 100000000, },
23 { HIX5HD2_FIXED_40M, "40m", NULL, 0, 40000000, },
24 { HIX5HD2_FIXED_150M, "150m", NULL, 0, 150000000, },
25 { HIX5HD2_FIXED_1728M, "1728m", NULL, 0, 1728000000, },
27 { HIX5HD2_FIXED_432M, "432m", NULL, 0, 432000000, },
29 { HIX5HD2_FIXED_288M, "288m", NULL, 0, 288000000, },
30 { HIX5HD2_FIXED_60M, "60m", NULL, 0, 60000000, },
31 { HIX5HD2_FIXED_750M, "750m", NULL, 0, 750000000, },
32 { HIX5HD2_FIXED_500M, "500m", NULL, 0, 500000000, },
33 { HIX5HD2_FIXED_54M, "54m", NULL, 0, 54000000, },
34 { HIX5HD2_FIXED_27M, "27m", NULL, 0, 27000000, },
35 { HIX5HD2_FIXED_1500M, "1500m", NULL, 0, 1500000000, },
36 { HIX5HD2_FIXED_375M, "375m", NULL, 0, 375000000, },
37 { HIX5HD2_FIXED_187M, "187m", NULL, 0, 187000000, },
38 { HIX5HD2_FIXED_250M, "250m", NULL, 0, 250000000, },
39 { HIX5HD2_FIXED_125M, "125m", NULL, 0, 125000000, },
40 { HIX5HD2_FIXED_2P02M, "2m", NULL, 0, 2000000, },
41 { HIX5HD2_FIXED_50M, "50m", NULL, 0, 50000000, },
42 { HIX5HD2_FIXED_25M, "25m", NULL, 0, 25000000, },
43 { HIX5HD2_FIXED_83M, "83m", NULL, 0, 83333333, },
47 "24m", "150m", "200m", "100m", "75m", };
51 "75m", "100m", "50m", "15m", };
54 static const char *const fephy_mux_p[] __initconst = { "25m", "125m"};
77 { HIX5HD2_SD_BIU_CLK, "clk_sd_biu", "200m",
84 { HIX5HD2_MMC_BIU_CLK, "clk_mmc_biu", "200m",
96 { HIX5HD2_WDG0_CLK, "clk_wdg0", "24m",
101 {HIX5HD2_I2C0_CLK, "clk_i2c0", "100m",
105 {HIX5HD2_I2C1_CLK, "clk_i2c1", "100m",
109 {HIX5HD2_I2C2_CLK, "clk_i2c2", "100m",
113 {HIX5HD2_I2C3_CLK, "clk_i2c3", "100m",
117 {HIX5HD2_I2C4_CLK, "clk_i2c4", "100m",
121 {HIX5HD2_I2C5_CLK, "clk_i2c5", "100m",