720 	struct stm32f4_pll_div *pll_div = to_pll_div_clk(div);  in stm32f4_pll_div_set_rate()  local
722 	pll_state = stm32f4_pll_is_enabled(pll_div->hw_pll);  in stm32f4_pll_div_set_rate()
725 		stm32f4_pll_disable(pll_div->hw_pll);  in stm32f4_pll_div_set_rate()
730 		stm32f4_pll_enable(pll_div->hw_pll);  in stm32f4_pll_div_set_rate()
747 	struct stm32f4_pll_div *pll_div;  in clk_register_pll_div()  local
753 	pll_div = kzalloc(sizeof(*pll_div), GFP_KERNEL);  in clk_register_pll_div()
754 	if (!pll_div)  in clk_register_pll_div()
764 	pll_div->div.reg = reg;  in clk_register_pll_div()
765 	pll_div->div.shift = shift;  in clk_register_pll_div()
766 	pll_div->div.width = width;  in clk_register_pll_div()
767 	pll_div->div.flags = clk_divider_flags;  in clk_register_pll_div()
768 	pll_div->div.lock = lock;  in clk_register_pll_div()
769 	pll_div->div.table = table;  in clk_register_pll_div()
770 	pll_div->div.hw.init = &init;  in clk_register_pll_div()
772 	pll_div->hw_pll = pll_hw;  in clk_register_pll_div()
775 	hw = &pll_div->div.hw;  in clk_register_pll_div()
778 		kfree(pll_div);  in clk_register_pll_div()