1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * clk-si5351.c: Skyworks / Silicon Labs Si5351A/B/C I2C Clock Generator
6  * Rabeeh Khoury <rabeeh@solid-run.com>
10  *     https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
12  *     https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/application-notes/AN619.pdf
18 #include <linux/clk-provider.h>
31 #include "clk-si5351.h"
63 	struct si5351_hw_data	*clkout;  member
88 	ret = regmap_read(drvdata->regmap, reg, &val);  in si5351_reg_read()
90 		dev_err(&drvdata->client->dev,  in si5351_reg_read()
101 	return regmap_bulk_read(drvdata->regmap, reg, buf, count);  in si5351_bulk_read()
107 	return regmap_write(drvdata->regmap, reg, val);  in si5351_reg_write()
113 	return regmap_raw_write(drvdata->regmap, reg, buf, count);  in si5351_bulk_write()
119 	return regmap_update_bits(drvdata->regmap, reg, mask, val);  in si5351_set_bits()
125 		return SI5351_CLK6_PARAMETERS + (num - 6);  in si5351_msynth_params_address()
138 		params->p1 = buf[0];  in si5351_read_parameters()
139 		params->p2 = 0;  in si5351_read_parameters()
140 		params->p3 = 1;  in si5351_read_parameters()
144 		params->p1 = ((buf[2] & 0x03) << 16) | (buf[3] << 8) | buf[4];  in si5351_read_parameters()
145 		params->p2 = ((buf[5] & 0x0f) << 16) | (buf[6] << 8) | buf[7];  in si5351_read_parameters()
146 		params->p3 = ((buf[5] & 0xf0) << 12) | (buf[0] << 8) | buf[1];  in si5351_read_parameters()
148 	params->valid = 1;  in si5351_read_parameters()
159 		buf[0] = params->p1 & 0xff;  in si5351_write_parameters()
163 		buf[0] = ((params->p3 & 0x0ff00) >> 8) & 0xff;  in si5351_write_parameters()
164 		buf[1] = params->p3 & 0xff;  in si5351_write_parameters()
167 		buf[2] |= ((params->p1 & 0x30000) >> 16) & 0x03;  in si5351_write_parameters()
168 		buf[3] = ((params->p1 & 0x0ff00) >> 8) & 0xff;  in si5351_write_parameters()
169 		buf[4] = params->p1 & 0xff;  in si5351_write_parameters()
170 		buf[5] = ((params->p3 & 0xf0000) >> 12) |  in si5351_write_parameters()
171 			((params->p2 & 0xf0000) >> 16);  in si5351_write_parameters()
172 		buf[6] = ((params->p2 & 0x0ff00) >> 8) & 0xff;  in si5351_write_parameters()
173 		buf[7] = params->p2 & 0xff;  in si5351_write_parameters()
200 	/* read-only */  in si5351_regmap_is_writeable()
290 	dev_dbg(&drvdata->client->dev, "%s - clkin div = %d, rate = %lu\n",  in si5351_clkin_recalc_rate()
311 	dev_warn(&hwdata->drvdata->client->dev, "VXCO currently unsupported\n");  in si5351_vxco_prepare()
351  * (1) MSNx_P1[17:0] = 128 * a + floor(128 * b/c) - 512
352  * (2) MSNx_P2[19:0] = 128 * b - c * floor(128 * b/c) = (128*b) mod c
358  * MSNx_P1 = 128 * a + (128 * b/MSNx_P2)/c - 512
374 		return -EINVAL;  in _si5351_pll_reparent()
376 	if (drvdata->variant != SI5351_VARIANT_C &&  in _si5351_pll_reparent()
378 		return -EINVAL;  in _si5351_pll_reparent()
389 	u8 mask = (hwdata->num == 0) ? SI5351_PLLA_SOURCE : SI5351_PLLB_SOURCE;  in si5351_pll_get_parent()
392 	val = si5351_reg_read(hwdata->drvdata, SI5351_PLL_INPUT_SOURCE);  in si5351_pll_get_parent()
402 	if (hwdata->drvdata->variant != SI5351_VARIANT_C &&  in si5351_pll_set_parent()
404 		return -EPERM;  in si5351_pll_set_parent()
407 		return -EINVAL;  in si5351_pll_set_parent()
409 	return _si5351_pll_reparent(hwdata->drvdata, hwdata->num,  in si5351_pll_set_parent()
419 	u8 reg = (hwdata->num == 0) ? SI5351_PLLA_PARAMETERS :  in si5351_pll_recalc_rate()
423 	if (!hwdata->params.valid)  in si5351_pll_recalc_rate()
424 		si5351_read_parameters(hwdata->drvdata, reg, &hwdata->params);  in si5351_pll_recalc_rate()
426 	if (hwdata->params.p3 == 0)  in si5351_pll_recalc_rate()
430 	rate  = hwdata->params.p1 * hwdata->params.p3;  in si5351_pll_recalc_rate()
431 	rate += 512 * hwdata->params.p3;  in si5351_pll_recalc_rate()
432 	rate += hwdata->params.p2;  in si5351_pll_recalc_rate()
434 	do_div(rate, 128 * hwdata->params.p3);  in si5351_pll_recalc_rate()
436 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_pll_recalc_rate()
437 		"%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, parent_rate = %lu, rate = %lu\n",  in si5351_pll_recalc_rate()
439 		hwdata->params.p1, hwdata->params.p2, hwdata->params.p3,  in si5351_pll_recalc_rate()
480 	hwdata->params.p3  = c;  in si5351_pll_round_rate()
481 	hwdata->params.p2  = (128 * b) % c;  in si5351_pll_round_rate()
482 	hwdata->params.p1  = 128 * a;  in si5351_pll_round_rate()
483 	hwdata->params.p1 += (128 * b / c);  in si5351_pll_round_rate()
484 	hwdata->params.p1 -= 512;  in si5351_pll_round_rate()
494 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_pll_round_rate()
495 		"%s - %s: a = %lu, b = %lu, c = %lu, parent_rate = %lu, rate = %lu\n",  in si5351_pll_round_rate()
507 	u8 reg = (hwdata->num == 0) ? SI5351_PLLA_PARAMETERS :  in si5351_pll_set_rate()
511 	si5351_write_parameters(hwdata->drvdata, reg, &hwdata->params);  in si5351_pll_set_rate()
514 	si5351_set_bits(hwdata->drvdata, SI5351_CLK6_CTRL + hwdata->num,  in si5351_pll_set_rate()
516 		(hwdata->params.p2 == 0) ? SI5351_CLK_INTEGER_MODE : 0);  in si5351_pll_set_rate()
519 	si5351_reg_write(hwdata->drvdata, SI5351_PLL_RESET,  in si5351_pll_set_rate()
520 			 hwdata->num == 0 ? SI5351_PLL_RESET_A :  in si5351_pll_set_rate()
523 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_pll_set_rate()
524 		"%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, parent_rate = %lu, rate = %lu\n",  in si5351_pll_set_rate()
526 		hwdata->params.p1, hwdata->params.p2, hwdata->params.p3,  in si5351_pll_set_rate()
552  * MSx_P1[17:0] = 128 * a + floor(128 * b/c) - 512
553  * MSx_P2[19:0] = 128 * b - c * floor(128 * b/c) = (128*b) mod c
570 		return -EINVAL;  in _si5351_msynth_reparent()
584 	val = si5351_reg_read(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num);  in si5351_msynth_get_parent()
594 	return _si5351_msynth_reparent(hwdata->drvdata, hwdata->num,  in si5351_msynth_set_parent()
604 	u8 reg = si5351_msynth_params_address(hwdata->num);  in si5351_msynth_recalc_rate()
608 	if (!hwdata->params.valid)  in si5351_msynth_recalc_rate()
609 		si5351_read_parameters(hwdata->drvdata, reg, &hwdata->params);  in si5351_msynth_recalc_rate()
612 	 * multisync0-5: fOUT = (128 * P3 * fIN) / (P1*P3 + P2 + 512*P3)  in si5351_msynth_recalc_rate()
613 	 * multisync6-7: fOUT = fIN / P1  in si5351_msynth_recalc_rate()
616 	if (hwdata->num > 5) {  in si5351_msynth_recalc_rate()
617 		m = hwdata->params.p1;  in si5351_msynth_recalc_rate()
618 	} else if (hwdata->params.p3 == 0) {  in si5351_msynth_recalc_rate()
620 	} else if ((si5351_reg_read(hwdata->drvdata, reg + 2) &  in si5351_msynth_recalc_rate()
624 		rate *= 128 * hwdata->params.p3;  in si5351_msynth_recalc_rate()
625 		m = hwdata->params.p1 * hwdata->params.p3;  in si5351_msynth_recalc_rate()
626 		m += hwdata->params.p2;  in si5351_msynth_recalc_rate()
627 		m += 512 * hwdata->params.p3;  in si5351_msynth_recalc_rate()
634 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_msynth_recalc_rate()
635 		"%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, m = %lu, parent_rate = %lu, rate = %lu\n",  in si5351_msynth_recalc_rate()
637 		hwdata->params.p1, hwdata->params.p2, hwdata->params.p3,  in si5351_msynth_recalc_rate()
652 	/* multisync6-7 can only handle freqencies < 150MHz */  in si5351_msynth_round_rate()
653 	if (hwdata->num >= 6 && rate > SI5351_MULTISYNTH67_MAX_FREQ)  in si5351_msynth_round_rate()
683 	} else if (hwdata->num >= 6) {  in si5351_msynth_round_rate()
696 		/* disable divby4 */  in si5351_msynth_round_rate()
732 		hwdata->params.p3 = 1;  in si5351_msynth_round_rate()
733 		hwdata->params.p2 = 0;  in si5351_msynth_round_rate()
734 		hwdata->params.p1 = 0;  in si5351_msynth_round_rate()
735 	} else if (hwdata->num >= 6) {  in si5351_msynth_round_rate()
736 		hwdata->params.p3 = 0;  in si5351_msynth_round_rate()
737 		hwdata->params.p2 = 0;  in si5351_msynth_round_rate()
738 		hwdata->params.p1 = a;  in si5351_msynth_round_rate()
740 		hwdata->params.p3  = c;  in si5351_msynth_round_rate()
741 		hwdata->params.p2  = (128 * b) % c;  in si5351_msynth_round_rate()
742 		hwdata->params.p1  = 128 * a;  in si5351_msynth_round_rate()
743 		hwdata->params.p1 += (128 * b / c);  in si5351_msynth_round_rate()
744 		hwdata->params.p1 -= 512;  in si5351_msynth_round_rate()
747 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_msynth_round_rate()
748 		"%s - %s: a = %lu, b = %lu, c = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n",  in si5351_msynth_round_rate()
760 	u8 reg = si5351_msynth_params_address(hwdata->num);  in si5351_msynth_set_rate()
764 	si5351_write_parameters(hwdata->drvdata, reg, &hwdata->params);  in si5351_msynth_set_rate()
769 	/* enable/disable integer mode and divby4 on multisynth0-5 */  in si5351_msynth_set_rate()
770 	if (hwdata->num < 6) {  in si5351_msynth_set_rate()
771 		si5351_set_bits(hwdata->drvdata, reg + 2,  in si5351_msynth_set_rate()
774 		si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num,  in si5351_msynth_set_rate()
776 			(hwdata->params.p2 == 0) ? SI5351_CLK_INTEGER_MODE : 0);  in si5351_msynth_set_rate()
779 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_msynth_set_rate()
780 		"%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n",  in si5351_msynth_set_rate()
782 		hwdata->params.p1, hwdata->params.p2, hwdata->params.p3,  in si5351_msynth_set_rate()
797  * Si5351 clkout divider
805 		return -EINVAL;  in _si5351_clkout_reparent()
822 		if (drvdata->variant != SI5351_VARIANT_C)  in _si5351_clkout_reparent()
823 			return -EINVAL;  in _si5351_clkout_reparent()
843 		return -EINVAL;  in _si5351_clkout_set_drive_strength()
873 	u8 shift = (num < 4) ? (2 * num) : (2 * (num-4));  in _si5351_clkout_set_disable_state()
878 		return -EINVAL;  in _si5351_clkout_set_disable_state()
918 	err = regmap_read_poll_timeout(drvdata->regmap, SI5351_PLL_RESET, v,  in _si5351_clkout_reset_pll()
921 		dev_err(&drvdata->client->dev, "Reset bit didn't clear\n");  in _si5351_clkout_reset_pll()
923 	dev_dbg(&drvdata->client->dev, "%s - %s: pll = %d\n",  in _si5351_clkout_reset_pll()
924 		__func__, clk_hw_get_name(&drvdata->clkout[num].hw),  in _si5351_clkout_reset_pll()
933 		hwdata->drvdata->client->dev.platform_data;  in si5351_clkout_prepare()
935 	si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num,  in si5351_clkout_prepare()
939 	 * Do a pll soft reset on the parent pll -- needed to get a  in si5351_clkout_prepare()
942 	if (pdata->clkout[hwdata->num].pll_reset)  in si5351_clkout_prepare()
943 		_si5351_clkout_reset_pll(hwdata->drvdata, hwdata->num);  in si5351_clkout_prepare()
945 	si5351_set_bits(hwdata->drvdata, SI5351_OUTPUT_ENABLE_CTRL,  in si5351_clkout_prepare()
946 			(1 << hwdata->num), 0);  in si5351_clkout_prepare()
955 	si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num,  in si5351_clkout_unprepare()
957 	si5351_set_bits(hwdata->drvdata, SI5351_OUTPUT_ENABLE_CTRL,  in si5351_clkout_unprepare()
958 			(1 << hwdata->num), (1 << hwdata->num));  in si5351_clkout_unprepare()
968 	val = si5351_reg_read(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num);  in si5351_clkout_get_parent()
1008 	return _si5351_clkout_reparent(hwdata->drvdata, hwdata->num, parent);  in si5351_clkout_set_parent()
1019 	if (hwdata->num <= 5)  in si5351_clkout_recalc_rate()
1020 		reg = si5351_msynth_params_address(hwdata->num) + 2;  in si5351_clkout_recalc_rate()
1024 	rdiv = si5351_reg_read(hwdata->drvdata, reg);  in si5351_clkout_recalc_rate()
1025 	if (hwdata->num == 6) {  in si5351_clkout_recalc_rate()
1043 	if (hwdata->num >= 6 && rate > SI5351_CLKOUT67_MAX_FREQ)  in si5351_clkout_round_rate()
1046 	/* clkout freqency is 8kHz - 160MHz */  in si5351_clkout_round_rate()
1068 		err = abs(new_rate - rate);  in si5351_clkout_round_rate()
1071 			new_err = abs(new_rate - rate);  in si5351_clkout_round_rate()
1080 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_clkout_round_rate()
1081 		"%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n",  in si5351_clkout_round_rate()
1099 	err = abs(new_rate - rate);  in si5351_clkout_set_rate()
1102 		new_err = abs(new_rate - rate);  in si5351_clkout_set_rate()
1110 	switch (hwdata->num) {  in si5351_clkout_set_rate()
1112 		si5351_set_bits(hwdata->drvdata, SI5351_CLK6_7_OUTPUT_DIVIDER,  in si5351_clkout_set_rate()
1116 		si5351_set_bits(hwdata->drvdata, SI5351_CLK6_7_OUTPUT_DIVIDER,  in si5351_clkout_set_rate()
1121 		si5351_set_bits(hwdata->drvdata,  in si5351_clkout_set_rate()
1122 				si5351_msynth_params_address(hwdata->num) + 2,  in si5351_clkout_set_rate()
1127 	/* powerup clkout */  in si5351_clkout_set_rate()
1128 	si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num,  in si5351_clkout_set_rate()
1131 	dev_dbg(&hwdata->drvdata->client->dev,  in si5351_clkout_set_rate()
1132 		"%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n",  in si5351_clkout_set_rate()
1155 	{ .compatible = "silabs,si5351a-msop",
1166 	struct device_node *child, *np = client->dev.of_node;  in si5351_dt_parse()
1176 	pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);  in si5351_dt_parse()
1178 		return -ENOMEM;  in si5351_dt_parse()
1181 	 * property silabs,pll-source : <num src>, [<..>]  in si5351_dt_parse()
1184 	of_property_for_each_u32(np, "silabs,pll-source", prop, p, num) {  in si5351_dt_parse()
1186 			dev_err(&client->dev,  in si5351_dt_parse()
1187 				"invalid pll %d on pll-source prop\n", num);  in si5351_dt_parse()
1188 			return -EINVAL;  in si5351_dt_parse()
1193 			dev_err(&client->dev,  in si5351_dt_parse()
1194 				"missing pll-source for pll %d\n", num);  in si5351_dt_parse()
1195 			return -EINVAL;  in si5351_dt_parse()
1200 			pdata->pll_src[num] = SI5351_PLL_SRC_XTAL;  in si5351_dt_parse()
1204 				dev_err(&client->dev,  in si5351_dt_parse()
1207 				return -EINVAL;  in si5351_dt_parse()
1209 			pdata->pll_src[num] = SI5351_PLL_SRC_CLKIN;  in si5351_dt_parse()
1212 			dev_err(&client->dev,  in si5351_dt_parse()
1214 			return -EINVAL;  in si5351_dt_parse()
1218 	/* per clkout properties */  in si5351_dt_parse()
1221 			dev_err(&client->dev, "missing reg property of %pOFn\n",  in si5351_dt_parse()
1228 			dev_err(&client->dev, "invalid clkout %d\n", num);  in si5351_dt_parse()
1232 		if (!of_property_read_u32(child, "silabs,multisynth-source",  in si5351_dt_parse()
1236 				pdata->clkout[num].multisynth_src =  in si5351_dt_parse()
1240 				pdata->clkout[num].multisynth_src =  in si5351_dt_parse()
1244 				dev_err(&client->dev,  in si5351_dt_parse()
1251 		if (!of_property_read_u32(child, "silabs,clock-source", &val)) {  in si5351_dt_parse()
1254 				pdata->clkout[num].clkout_src =  in si5351_dt_parse()
1258 				pdata->clkout[num].clkout_src =  in si5351_dt_parse()
1262 				pdata->clkout[num].clkout_src =  in si5351_dt_parse()
1267 					dev_err(&client->dev,  in si5351_dt_parse()
1268 						"invalid parent %d for clkout %d\n",  in si5351_dt_parse()
1272 				pdata->clkout[num].clkout_src =  in si5351_dt_parse()
1276 				dev_err(&client->dev,  in si5351_dt_parse()
1277 					"invalid parent %d for clkout %d\n",  in si5351_dt_parse()
1283 		if (!of_property_read_u32(child, "silabs,drive-strength",  in si5351_dt_parse()
1290 				pdata->clkout[num].drive = val;  in si5351_dt_parse()
1293 				dev_err(&client->dev,  in si5351_dt_parse()
1294 					"invalid drive strength %d for clkout %d\n",  in si5351_dt_parse()
1300 		if (!of_property_read_u32(child, "silabs,disable-state",  in si5351_dt_parse()
1304 				pdata->clkout[num].disable_state =  in si5351_dt_parse()
1308 				pdata->clkout[num].disable_state =  in si5351_dt_parse()
1312 				pdata->clkout[num].disable_state =  in si5351_dt_parse()
1316 				pdata->clkout[num].disable_state =  in si5351_dt_parse()
1320 				dev_err(&client->dev,  in si5351_dt_parse()
1321 					"invalid disable state %d for clkout %d\n",  in si5351_dt_parse()
1327 		if (!of_property_read_u32(child, "clock-frequency", &val))  in si5351_dt_parse()
1328 			pdata->clkout[num].rate = val;  in si5351_dt_parse()
1330 		pdata->clkout[num].pll_master =  in si5351_dt_parse()
1331 			of_property_read_bool(child, "silabs,pll-master");  in si5351_dt_parse()
1333 		pdata->clkout[num].pll_reset =  in si5351_dt_parse()
1334 			of_property_read_bool(child, "silabs,pll-reset");  in si5351_dt_parse()
1336 	client->dev.platform_data = pdata;  in si5351_dt_parse()
1341 	return -EINVAL;  in si5351_dt_parse()
1348 	unsigned int idx = clkspec->args[0];  in si53351_of_clk_get()
1350 	if (idx >= drvdata->num_clkout) {  in si53351_of_clk_get()
1352 		return ERR_PTR(-EINVAL);  in si53351_of_clk_get()
1355 	return &drvdata->clkout[idx].hw;  in si53351_of_clk_get()
1372 	{ "si5351a-msop", SI5351_VARIANT_A3 },
1382 	enum si5351_variant variant = (enum si5351_variant)id->driver_data;  in si5351_i2c_probe()
1394 	pdata = client->dev.platform_data;  in si5351_i2c_probe()
1396 		return -EINVAL;  in si5351_i2c_probe()
1398 	drvdata = devm_kzalloc(&client->dev, sizeof(*drvdata), GFP_KERNEL);  in si5351_i2c_probe()
1400 		return -ENOMEM;  in si5351_i2c_probe()
1403 	drvdata->client = client;  in si5351_i2c_probe()
1404 	drvdata->variant = variant;  in si5351_i2c_probe()
1405 	drvdata->pxtal = devm_clk_get(&client->dev, "xtal");  in si5351_i2c_probe()
1406 	drvdata->pclkin = devm_clk_get(&client->dev, "clkin");  in si5351_i2c_probe()
1408 	if (PTR_ERR(drvdata->pxtal) == -EPROBE_DEFER ||  in si5351_i2c_probe()
1409 	    PTR_ERR(drvdata->pclkin) == -EPROBE_DEFER)  in si5351_i2c_probe()
1410 		return -EPROBE_DEFER;  in si5351_i2c_probe()
1416 	if (IS_ERR(drvdata->pxtal) &&  in si5351_i2c_probe()
1417 	    (drvdata->variant != SI5351_VARIANT_C || IS_ERR(drvdata->pclkin))) {  in si5351_i2c_probe()
1418 		dev_err(&client->dev, "missing parent clock\n");  in si5351_i2c_probe()
1419 		return -EINVAL;  in si5351_i2c_probe()
1422 	drvdata->regmap = devm_regmap_init_i2c(client, &si5351_regmap_config);  in si5351_i2c_probe()
1423 	if (IS_ERR(drvdata->regmap)) {  in si5351_i2c_probe()
1424 		dev_err(&client->dev, "failed to allocate register map\n");  in si5351_i2c_probe()
1425 		return PTR_ERR(drvdata->regmap);  in si5351_i2c_probe()
1428 	/* Disable interrupts */  in si5351_i2c_probe()
1431 	if (drvdata->variant != SI5351_VARIANT_C)  in si5351_i2c_probe()
1437 		ret = _si5351_pll_reparent(drvdata, n, pdata->pll_src[n]);  in si5351_i2c_probe()
1439 			dev_err(&client->dev,  in si5351_i2c_probe()
1441 				n, pdata->pll_src[n]);  in si5351_i2c_probe()
1448 					      pdata->clkout[n].multisynth_src);  in si5351_i2c_probe()
1450 			dev_err(&client->dev,  in si5351_i2c_probe()
1452 				n, pdata->clkout[n].multisynth_src);  in si5351_i2c_probe()
1457 					      pdata->clkout[n].clkout_src);  in si5351_i2c_probe()
1459 			dev_err(&client->dev,  in si5351_i2c_probe()
1460 				"failed to reparent clkout %d to %d\n",  in si5351_i2c_probe()
1461 				n, pdata->clkout[n].clkout_src);  in si5351_i2c_probe()
1466 							pdata->clkout[n].drive);  in si5351_i2c_probe()
1468 			dev_err(&client->dev,  in si5351_i2c_probe()
1469 				"failed set drive strength of clkout%d to %d\n",  in si5351_i2c_probe()
1470 				n, pdata->clkout[n].drive);  in si5351_i2c_probe()
1475 						pdata->clkout[n].disable_state);  in si5351_i2c_probe()
1477 			dev_err(&client->dev,  in si5351_i2c_probe()
1478 				"failed set disable state of clkout%d to %d\n",  in si5351_i2c_probe()
1479 				n, pdata->clkout[n].disable_state);  in si5351_i2c_probe()
1489 	if (!IS_ERR(drvdata->pxtal)) {  in si5351_i2c_probe()
1490 		drvdata->pxtal_name = __clk_get_name(drvdata->pxtal);  in si5351_i2c_probe()
1491 		init.parent_names = &drvdata->pxtal_name;  in si5351_i2c_probe()
1494 	drvdata->xtal.init = &init;  in si5351_i2c_probe()
1495 	ret = devm_clk_hw_register(&client->dev, &drvdata->xtal);  in si5351_i2c_probe()
1497 		dev_err(&client->dev, "unable to register %s\n", init.name);  in si5351_i2c_probe()
1502 	if (drvdata->variant == SI5351_VARIANT_C) {  in si5351_i2c_probe()
1506 		if (!IS_ERR(drvdata->pclkin)) {  in si5351_i2c_probe()
1507 			drvdata->pclkin_name = __clk_get_name(drvdata->pclkin);  in si5351_i2c_probe()
1508 			init.parent_names = &drvdata->pclkin_name;  in si5351_i2c_probe()
1511 		drvdata->clkin.init = &init;  in si5351_i2c_probe()
1512 		ret = devm_clk_hw_register(&client->dev, &drvdata->clkin);  in si5351_i2c_probe()
1514 			dev_err(&client->dev, "unable to register %s\n",  in si5351_i2c_probe()
1521 	num_parents = (drvdata->variant == SI5351_VARIANT_C) ? 2 : 1;  in si5351_i2c_probe()
1526 	drvdata->pll[0].num = 0;  in si5351_i2c_probe()
1527 	drvdata->pll[0].drvdata = drvdata;  in si5351_i2c_probe()
1528 	drvdata->pll[0].hw.init = &init;  in si5351_i2c_probe()
1535 	ret = devm_clk_hw_register(&client->dev, &drvdata->pll[0].hw);  in si5351_i2c_probe()
1537 		dev_err(&client->dev, "unable to register %s\n", init.name);  in si5351_i2c_probe()
1542 	drvdata->pll[1].num = 1;  in si5351_i2c_probe()
1543 	drvdata->pll[1].drvdata = drvdata;  in si5351_i2c_probe()
1544 	drvdata->pll[1].hw.init = &init;  in si5351_i2c_probe()
1546 	if (drvdata->variant == SI5351_VARIANT_B) {  in si5351_i2c_probe()
1559 	ret = devm_clk_hw_register(&client->dev, &drvdata->pll[1].hw);  in si5351_i2c_probe()
1561 		dev_err(&client->dev, "unable to register %s\n", init.name);  in si5351_i2c_probe()
1566 	num_clocks = (drvdata->variant == SI5351_VARIANT_A3) ? 3 : 8;  in si5351_i2c_probe()
1568 	if (drvdata->variant == SI5351_VARIANT_B)  in si5351_i2c_probe()
1573 	drvdata->msynth = devm_kcalloc(&client->dev, num_clocks,  in si5351_i2c_probe()
1574 				       sizeof(*drvdata->msynth), GFP_KERNEL);  in si5351_i2c_probe()
1575 	drvdata->clkout = devm_kcalloc(&client->dev, num_clocks,  in si5351_i2c_probe()
1576 				       sizeof(*drvdata->clkout), GFP_KERNEL);  in si5351_i2c_probe()
1577 	drvdata->num_clkout = num_clocks;  in si5351_i2c_probe()
1579 	if (WARN_ON(!drvdata->msynth || !drvdata->clkout)) {  in si5351_i2c_probe()
1580 		ret = -ENOMEM;  in si5351_i2c_probe()
1585 		drvdata->msynth[n].num = n;  in si5351_i2c_probe()
1586 		drvdata->msynth[n].drvdata = drvdata;  in si5351_i2c_probe()
1587 		drvdata->msynth[n].hw.init = &init;  in si5351_i2c_probe()
1592 		if (pdata->clkout[n].pll_master)  in si5351_i2c_probe()
1596 		ret = devm_clk_hw_register(&client->dev,  in si5351_i2c_probe()
1597 					   &drvdata->msynth[n].hw);  in si5351_i2c_probe()
1599 			dev_err(&client->dev, "unable to register %s\n",  in si5351_i2c_probe()
1605 	num_parents = (drvdata->variant == SI5351_VARIANT_C) ? 4 : 3;  in si5351_i2c_probe()
1613 		drvdata->clkout[n].num = n;  in si5351_i2c_probe()
1614 		drvdata->clkout[n].drvdata = drvdata;  in si5351_i2c_probe()
1615 		drvdata->clkout[n].hw.init = &init;  in si5351_i2c_probe()
1620 		if (pdata->clkout[n].clkout_src == SI5351_CLKOUT_SRC_MSYNTH_N)  in si5351_i2c_probe()
1624 		ret = devm_clk_hw_register(&client->dev,  in si5351_i2c_probe()
1625 					   &drvdata->clkout[n].hw);  in si5351_i2c_probe()
1627 			dev_err(&client->dev, "unable to register %s\n",  in si5351_i2c_probe()
1632 		/* set initial clkout rate */  in si5351_i2c_probe()
1633 		if (pdata->clkout[n].rate != 0) {  in si5351_i2c_probe()
1635 			ret = clk_set_rate(drvdata->clkout[n].hw.clk,  in si5351_i2c_probe()
1636 					   pdata->clkout[n].rate);  in si5351_i2c_probe()
1638 				dev_err(&client->dev, "Cannot set rate : %d\n",  in si5351_i2c_probe()
1644 	ret = of_clk_add_hw_provider(client->dev.of_node, si53351_of_clk_get,  in si5351_i2c_probe()
1647 		dev_err(&client->dev, "unable to add clk provider\n");  in si5351_i2c_probe()
1656 	of_clk_del_provider(client->dev.of_node);  in si5351_i2c_remove()