Lines Matching full:p3

38 	unsigned long	p3;  member
140 params->p3 = 1; in si5351_read_parameters()
146 params->p3 = ((buf[5] & 0xf0) << 12) | (buf[0] << 8) | buf[1]; in si5351_read_parameters()
163 buf[0] = ((params->p3 & 0x0ff00) >> 8) & 0xff; in si5351_write_parameters()
164 buf[1] = params->p3 & 0xff; in si5351_write_parameters()
170 buf[5] = ((params->p3 & 0xf0000) >> 12) | in si5351_write_parameters()
426 if (hwdata->params.p3 == 0) in si5351_pll_recalc_rate()
429 /* fVCO = fIN * (P1*P3 + 512*P3 + P2)/(128*P3) */ in si5351_pll_recalc_rate()
430 rate = hwdata->params.p1 * hwdata->params.p3; in si5351_pll_recalc_rate()
431 rate += 512 * hwdata->params.p3; in si5351_pll_recalc_rate()
434 do_div(rate, 128 * hwdata->params.p3); in si5351_pll_recalc_rate()
437 "%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, parent_rate = %lu, rate = %lu\n", in si5351_pll_recalc_rate()
439 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_pll_recalc_rate()
480 hwdata->params.p3 = c; in si5351_pll_round_rate()
524 "%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, parent_rate = %lu, rate = %lu\n", in si5351_pll_set_rate()
526 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_pll_set_rate()
557 * P2 and P3 are not applicable
612 * multisync0-5: fOUT = (128 * P3 * fIN) / (P1*P3 + P2 + 512*P3) in si5351_msynth_recalc_rate()
618 } else if (hwdata->params.p3 == 0) { in si5351_msynth_recalc_rate()
624 rate *= 128 * hwdata->params.p3; in si5351_msynth_recalc_rate()
625 m = hwdata->params.p1 * hwdata->params.p3; in si5351_msynth_recalc_rate()
627 m += 512 * hwdata->params.p3; in si5351_msynth_recalc_rate()
635 "%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, m = %lu, parent_rate = %lu, rate = %lu\n", in si5351_msynth_recalc_rate()
637 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_msynth_recalc_rate()
732 hwdata->params.p3 = 1; in si5351_msynth_round_rate()
736 hwdata->params.p3 = 0; in si5351_msynth_round_rate()
740 hwdata->params.p3 = c; in si5351_msynth_round_rate()
780 "%s - %s: p1 = %lu, p2 = %lu, p3 = %lu, divby4 = %d, parent_rate = %lu, rate = %lu\n", in si5351_msynth_set_rate()
782 hwdata->params.p1, hwdata->params.p2, hwdata->params.p3, in si5351_msynth_set_rate()