1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * Driver for Renesas 9-series PCIe clock generator driver
5  * The following series can be supported:
6  *   - 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ
8  *   - 9FGV0241
13 #include <linux/clk-provider.h>
48 /* Supported Renesas 9-series models. */
53 /* Structure to describe features of a particular 9-series model */
71  * Renesas 9-series i2c regmap
107 		return -EIO;  in rs9_regmap_i2c_write()
119 	xfer[0].addr = i2c->addr;  in rs9_regmap_i2c_read()
124 	xfer[1].addr = i2c->addr;  in rs9_regmap_i2c_read()
129 	ret = i2c_transfer(i2c->adapter, xfer, 2);  in rs9_regmap_i2c_read()
133 		return -EIO;  in rs9_regmap_i2c_read()
157 	struct i2c_client *client = rs9->client;  in rs9_get_output_config()
164 	rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx);  in rs9_get_output_config()
165 	rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx);  in rs9_get_output_config()
168 	np = of_get_child_by_name(client->dev.of_node, name);  in rs9_get_output_config()
173 	ret = of_property_read_u32(np, "renesas,slew-rate", &sr);  in rs9_get_output_config()
177 			rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx);  in rs9_get_output_config()
178 			rs9->clk_dif_sr |= RS9_REG_SR_2V0_DIF(idx);  in rs9_get_output_config()
180 			rs9->clk_dif_sr &= ~RS9_REG_SR_DIF_MASK(idx);  in rs9_get_output_config()
181 			rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx);  in rs9_get_output_config()
183 			ret = dev_err_probe(&client->dev, -EINVAL,  in rs9_get_output_config()
184 					    "Invalid renesas,slew-rate value\n");  in rs9_get_output_config()
192 	struct i2c_client *client = rs9->client;  in rs9_get_common_config()
193 	struct device_node *np = client->dev.of_node;  in rs9_get_common_config()
198 	rs9->pll_amplitude = RS9_REG_SS_AMP_0V7;  in rs9_get_common_config()
199 	rs9->pll_ssc = RS9_REG_SS_SSC_100;  in rs9_get_common_config()
202 	ret = of_property_read_u32(np, "renesas,out-amplitude-microvolt",  in rs9_get_common_config()
206 			rs9->pll_amplitude = RS9_REG_SS_AMP_0V6;  in rs9_get_common_config()
208 			rs9->pll_amplitude = RS9_REG_SS_AMP_0V7;  in rs9_get_common_config()
210 			rs9->pll_amplitude = RS9_REG_SS_AMP_0V8;  in rs9_get_common_config()
212 			rs9->pll_amplitude = RS9_REG_SS_AMP_0V9;  in rs9_get_common_config()
214 			return dev_err_probe(&client->dev, -EINVAL,  in rs9_get_common_config()
215 					     "Invalid renesas,out-amplitude-microvolt value\n");  in rs9_get_common_config()
219 	ret = of_property_read_u32(np, "renesas,out-spread-spectrum", &ssc);  in rs9_get_common_config()
222 			rs9->pll_ssc = RS9_REG_SS_SSC_100;  in rs9_get_common_config()
223 		else if (ssc == 99750)	/* -0.25% ... down spread */  in rs9_get_common_config()
224 			rs9->pll_ssc = RS9_REG_SS_SSC_M025;  in rs9_get_common_config()
225 		else if (ssc == 99500)	/* -0.50% ... down spread */  in rs9_get_common_config()
226 			rs9->pll_ssc = RS9_REG_SS_SSC_M050;  in rs9_get_common_config()
228 			return dev_err_probe(&client->dev, -EINVAL,  in rs9_get_common_config()
229 					     "Invalid renesas,out-spread-spectrum value\n");  in rs9_get_common_config()
239 	/* If amplitude is non-default, update it. */  in rs9_update_config()
240 	if (rs9->pll_amplitude != RS9_REG_SS_AMP_0V7) {  in rs9_update_config()
241 		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_AMP_MASK,  in rs9_update_config()
242 				   rs9->pll_amplitude);  in rs9_update_config()
245 	/* If SSC is non-default, update it. */  in rs9_update_config()
246 	if (rs9->pll_ssc != RS9_REG_SS_SSC_100) {  in rs9_update_config()
247 		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_SSC_MASK,  in rs9_update_config()
248 				   rs9->pll_ssc);  in rs9_update_config()
251 	for (i = 0; i < rs9->chip_info->num_clks; i++) {  in rs9_update_config()
252 		if (rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i))  in rs9_update_config()
255 		regmap_update_bits(rs9->regmap, RS9_REG_SR, RS9_REG_SR_3V0_DIF(i),  in rs9_update_config()
256 				   rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i));  in rs9_update_config()
264 	unsigned int idx = clkspec->args[0];  in rs9_of_clk_get()
266 	return rs9->clk_dif[idx];  in rs9_of_clk_get()
276 	rs9 = devm_kzalloc(&client->dev, sizeof(*rs9), GFP_KERNEL);  in rs9_probe()
278 		return -ENOMEM;  in rs9_probe()
281 	rs9->client = client;  in rs9_probe()
282 	rs9->chip_info = device_get_match_data(&client->dev);  in rs9_probe()
283 	if (!rs9->chip_info)  in rs9_probe()
284 		return -EINVAL;  in rs9_probe()
292 	for (i = 0; i < rs9->chip_info->num_clks; i++) {  in rs9_probe()
298 	rs9->regmap = devm_regmap_init(&client->dev, NULL,  in rs9_probe()
300 	if (IS_ERR(rs9->regmap))  in rs9_probe()
301 		return dev_err_probe(&client->dev, PTR_ERR(rs9->regmap),  in rs9_probe()
305 	ret = regmap_write(rs9->regmap, RS9_REG_BCP, 1);  in rs9_probe()
310 	for (i = 0; i < rs9->chip_info->num_clks; i++) {  in rs9_probe()
312 		hw = devm_clk_hw_register_fixed_factor_index(&client->dev, name,  in rs9_probe()
317 		rs9->clk_dif[i] = hw;  in rs9_probe()
320 	ret = devm_of_clk_add_hw_provider(&client->dev, rs9_of_clk_get, rs9);  in rs9_probe()
331 	regcache_cache_only(rs9->regmap, true);  in rs9_suspend()
332 	regcache_mark_dirty(rs9->regmap);  in rs9_suspend()
342 	regcache_cache_only(rs9->regmap, false);  in rs9_resume()
343 	ret = regcache_sync(rs9->regmap);  in rs9_resume()
355 	{ "9fgv0241", .driver_data = RENESAS_9FGV0241 },
361 	{ .compatible = "renesas,9fgv0241", .data = &renesas_9fgv0241_info },
370 		.name = "clk-renesas-pcie-9series",
380 MODULE_DESCRIPTION("Renesas 9-series PCIe clock generator driver");