39 	const struct clk_pcr_layout *layout;  member
169 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_set()
170 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_set()
171 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_set()
172 			   periph->layout->div_mask | periph->layout->cmd |  in clk_sam9x5_peripheral_set()
174 			   field_prep(periph->layout->div_mask, periph->div) |  in clk_sam9x5_peripheral_set()
175 			   periph->layout->cmd | enable);  in clk_sam9x5_peripheral_set()
197 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
198 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_disable()
199 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
200 			   AT91_PMC_PCR_EN | periph->layout->cmd,  in clk_sam9x5_peripheral_disable()
201 			   periph->layout->cmd);  in clk_sam9x5_peripheral_disable()
215 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_is_enabled()
216 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_is_enabled()
217 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_is_enabled()
235 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_recalc_rate()
236 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_recalc_rate()
237 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_recalc_rate()
241 		periph->div = field_get(periph->layout->div_mask, status);  in clk_sam9x5_peripheral_recalc_rate()
445 				    const struct clk_pcr_layout *layout,  in at91_clk_register_sam9x5_peripheral()  argument
479 	if (layout->div_mask)  in at91_clk_register_sam9x5_peripheral()
481 	periph->layout = layout;  in at91_clk_register_sam9x5_peripheral()