11 bool __must_check mhi_ep_check_mhi_state(struct mhi_ep_cntrl *mhi_cntrl,  in mhi_ep_check_mhi_state()  argument
30 int mhi_ep_set_mhi_state(struct mhi_ep_cntrl *mhi_cntrl, enum mhi_state mhi_state)  in mhi_ep_set_mhi_state()  argument
32 	struct device *dev = &mhi_cntrl->mhi_dev->dev;  in mhi_ep_set_mhi_state()
34 	if (!mhi_ep_check_mhi_state(mhi_cntrl, mhi_cntrl->mhi_state, mhi_state)) {  in mhi_ep_set_mhi_state()
37 			mhi_state_str(mhi_cntrl->mhi_state));  in mhi_ep_set_mhi_state()
47 	mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK, mhi_state);  in mhi_ep_set_mhi_state()
48 	mhi_cntrl->mhi_state = mhi_state;  in mhi_ep_set_mhi_state()
51 		mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK, 1);  in mhi_ep_set_mhi_state()
54 		mhi_ep_mmio_masked_write(mhi_cntrl, EP_MHISTATUS, MHISTATUS_SYSERR_MASK, 1);  in mhi_ep_set_mhi_state()
59 int mhi_ep_set_m0_state(struct mhi_ep_cntrl *mhi_cntrl)  in mhi_ep_set_m0_state()  argument
61 	struct device *dev = &mhi_cntrl->mhi_dev->dev;  in mhi_ep_set_m0_state()
66 	spin_lock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_m0_state()
67 	old_state = mhi_cntrl->mhi_state;  in mhi_ep_set_m0_state()
69 		mhi_ep_resume_channels(mhi_cntrl);  in mhi_ep_set_m0_state()
71 	ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M0);  in mhi_ep_set_m0_state()
72 	spin_unlock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_m0_state()
75 		mhi_ep_handle_syserr(mhi_cntrl);  in mhi_ep_set_m0_state()
80 	ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M0);  in mhi_ep_set_m0_state()
88 		ret = mhi_ep_send_ee_event(mhi_cntrl, MHI_EE_AMSS);  in mhi_ep_set_m0_state()
98 int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)  in mhi_ep_set_m3_state()  argument
100 	struct device *dev = &mhi_cntrl->mhi_dev->dev;  in mhi_ep_set_m3_state()
103 	spin_lock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_m3_state()
104 	ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M3);  in mhi_ep_set_m3_state()
105 	spin_unlock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_m3_state()
108 		mhi_ep_handle_syserr(mhi_cntrl);  in mhi_ep_set_m3_state()
112 	mhi_ep_suspend_channels(mhi_cntrl);  in mhi_ep_set_m3_state()
115 	ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M3);  in mhi_ep_set_m3_state()
124 int mhi_ep_set_ready_state(struct mhi_ep_cntrl *mhi_cntrl)  in mhi_ep_set_ready_state()  argument
126 	struct device *dev = &mhi_cntrl->mhi_dev->dev;  in mhi_ep_set_ready_state()
130 	spin_lock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_ready_state()
132 	mhi_state = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK);  in mhi_ep_set_ready_state()
133 	is_ready = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK);  in mhi_ep_set_ready_state()
137 		spin_unlock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_ready_state()
141 	ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_READY);  in mhi_ep_set_ready_state()
142 	spin_unlock_bh(&mhi_cntrl->state_lock);  in mhi_ep_set_ready_state()
145 		mhi_ep_handle_syserr(mhi_cntrl);  in mhi_ep_set_ready_state()