271 static void inic_reset_port(void __iomem *port_base)  in inic_reset_port()  argument
273 	void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;  in inic_reset_port()
288 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_reset_port()
319 	void __iomem *port_base = inic_port_base(ap);  in inic_stop_idma()  local
321 	readb(port_base + PORT_RPQ_FIFO);  in inic_stop_idma()
322 	readb(port_base + PORT_RPQ_CNT);  in inic_stop_idma()
323 	writew(0, port_base + PORT_IDMA_CTL);  in inic_stop_idma()
384 	void __iomem *port_base = inic_port_base(ap);  in inic_host_intr()  local
390 	irq_stat = readb(port_base + PORT_IRQ_STAT);  in inic_host_intr()
391 	writeb(irq_stat, port_base + PORT_IRQ_STAT);  in inic_host_intr()
392 	idma_stat = readw(port_base + PORT_IDMA_STAT);  in inic_host_intr()
406 		if (unlikely(readb(port_base + PORT_TF_COMMAND) &  in inic_host_intr()
546 	void __iomem *port_base = inic_port_base(ap);  in inic_qc_issue()  local
549 	writew(HCTL_FTHD0 | HCTL_LEDEN, port_base + HOST_CTL);  in inic_qc_issue()
550 	writew(IDMA_CTL_GO, port_base + PORT_IDMA_CTL);  in inic_qc_issue()
551 	writeb(0, port_base + PORT_CPB_PTQFIFO);  in inic_qc_issue()
558 	void __iomem *port_base = inic_port_base(ap);  in inic_tf_read()  local
560 	tf->error	= readb(port_base + PORT_TF_FEATURE);  in inic_tf_read()
561 	tf->nsect	= readb(port_base + PORT_TF_NSECT);  in inic_tf_read()
562 	tf->lbal	= readb(port_base + PORT_TF_LBAL);  in inic_tf_read()
563 	tf->lbam	= readb(port_base + PORT_TF_LBAM);  in inic_tf_read()
564 	tf->lbah	= readb(port_base + PORT_TF_LBAH);  in inic_tf_read()
565 	tf->device	= readb(port_base + PORT_TF_DEVICE);  in inic_tf_read()
566 	tf->status	= readb(port_base + PORT_TF_COMMAND);  in inic_tf_read()
593 	void __iomem *port_base = inic_port_base(ap);  in inic_freeze()  local
595 	writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK);  in inic_freeze()
596 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_freeze()
601 	void __iomem *port_base = inic_port_base(ap);  in inic_thaw()  local
603 	writeb(0xff, port_base + PORT_IRQ_STAT);  in inic_thaw()
604 	writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK);  in inic_thaw()
609 	void __iomem *port_base = inic_port_base(link->ap);  in inic_check_ready()  local
611 	return ata_check_ready(readb(port_base + PORT_TF_COMMAND));  in inic_check_ready()
622 	void __iomem *port_base = inic_port_base(ap);  in inic_hardreset()  local
623 	void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;  in inic_hardreset()
628 	inic_reset_port(port_base);  in inic_hardreset()
666 	void __iomem *port_base = inic_port_base(ap);  in inic_error_handler()  local
668 	inic_reset_port(port_base);  in inic_error_handler()
681 	void __iomem *port_base = inic_port_base(ap);  in init_port()  local
689 	writel(pp->cpb_tbl_dma, port_base + PORT_CPB_CPBLAR);  in init_port()
779 		void __iomem *port_base = mmio_base + i * PORT_SIZE;  in init_controller()  local
781 		writeb(0xff, port_base + PORT_IRQ_MASK);  in init_controller()
782 		inic_reset_port(port_base);  in init_controller()