Lines Matching +full:pio +full:- +full:transfer
21 * Tested on arch/arm/mach-spear13xx
120 /* CF Transfer Address */
124 /* Transfer Control */
167 /* ATA Status-Command */
171 /* Extended Write Data Port 0x200-0x3FC */
173 /* Extended Read Data Port 0x400-0x5FC */
199 /* status to be updated to framework regarding DMA transfer */
205 /* Completion for transfer complete interrupt from controller */
207 /* Completion for DMA transfer complete. */
213 /* DMA transfer work */
228 struct device *dev = acdev->host->dev; in cf_dumpregs()
231 dev_dbg(dev, ": CFI_STS: %x", readl(acdev->vbase + CFI_STS)); in cf_dumpregs()
232 dev_dbg(dev, ": IRQ_STS: %x", readl(acdev->vbase + IRQ_STS)); in cf_dumpregs()
233 dev_dbg(dev, ": IRQ_EN: %x", readl(acdev->vbase + IRQ_EN)); in cf_dumpregs()
234 dev_dbg(dev, ": OP_MODE: %x", readl(acdev->vbase + OP_MODE)); in cf_dumpregs()
235 dev_dbg(dev, ": CLK_CFG: %x", readl(acdev->vbase + CLK_CFG)); in cf_dumpregs()
236 dev_dbg(dev, ": TM_CFG: %x", readl(acdev->vbase + TM_CFG)); in cf_dumpregs()
237 dev_dbg(dev, ": XFER_CTR: %x", readl(acdev->vbase + XFER_CTR)); in cf_dumpregs()
238 dev_dbg(dev, ": GIRQ_STS: %x", readl(acdev->vbase + GIRQ_STS)); in cf_dumpregs()
239 dev_dbg(dev, ": GIRQ_STS_EN: %x", readl(acdev->vbase + GIRQ_STS_EN)); in cf_dumpregs()
240 dev_dbg(dev, ": GIRQ_SGN_EN: %x", readl(acdev->vbase + GIRQ_SGN_EN)); in cf_dumpregs()
248 writel(enable, acdev->vbase + GIRQ_STS_EN); in cf_ginterrupt_enable()
249 writel(enable, acdev->vbase + GIRQ_SGN_EN); in cf_ginterrupt_enable()
256 u32 val = readl(acdev->vbase + IRQ_EN); in cf_interrupt_enable()
259 writel(mask, acdev->vbase + IRQ_STS); in cf_interrupt_enable()
260 writel(val | mask, acdev->vbase + IRQ_EN); in cf_interrupt_enable()
262 writel(val & ~mask, acdev->vbase + IRQ_EN); in cf_interrupt_enable()
267 u32 val = readl(acdev->vbase + OP_MODE); in cf_card_reset()
269 writel(val | CARD_RESET, acdev->vbase + OP_MODE); in cf_card_reset()
271 writel(val & ~CARD_RESET, acdev->vbase + OP_MODE); in cf_card_reset()
276 writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB, in cf_ctrl_reset()
277 acdev->vbase + OP_MODE); in cf_ctrl_reset()
278 writel(readl(acdev->vbase + OP_MODE) | CFHOST_ENB, in cf_ctrl_reset()
279 acdev->vbase + OP_MODE); in cf_ctrl_reset()
284 struct ata_port *ap = acdev->host->ports[0]; in cf_card_detect()
285 struct ata_eh_info *ehi = &ap->link.eh_info; in cf_card_detect()
286 u32 val = readl(acdev->vbase + CFI_STS); in cf_card_detect()
290 if (acdev->card_present) in cf_card_detect()
292 acdev->card_present = 1; in cf_card_detect()
295 if (!acdev->card_present) in cf_card_detect()
297 acdev->card_present = 0; in cf_card_detect()
308 struct arasan_cf_pdata *pdata = dev_get_platdata(acdev->host->dev); in cf_init()
313 ret = clk_prepare_enable(acdev->clk); in cf_init()
315 dev_dbg(acdev->host->dev, "clock enable failed"); in cf_init()
319 ret = clk_set_rate(acdev->clk, 166000000); in cf_init()
321 dev_warn(acdev->host->dev, "clock set rate failed"); in cf_init()
322 clk_disable_unprepare(acdev->clk); in cf_init()
326 spin_lock_irqsave(&acdev->host->lock, flags); in cf_init()
330 if (pdata && pdata->cf_if_clk <= CF_IF_CLK_200M) in cf_init()
331 if_clk = pdata->cf_if_clk; in cf_init()
333 writel(if_clk, acdev->vbase + CLK_CFG); in cf_init()
335 writel(TRUE_IDE_MODE | CFHOST_ENB, acdev->vbase + OP_MODE); in cf_init()
338 spin_unlock_irqrestore(&acdev->host->lock, flags); in cf_init()
347 spin_lock_irqsave(&acdev->host->lock, flags); in cf_exit()
351 writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB, in cf_exit()
352 acdev->vbase + OP_MODE); in cf_exit()
353 spin_unlock_irqrestore(&acdev->host->lock, flags); in cf_exit()
354 clk_disable_unprepare(acdev->clk); in cf_exit()
361 complete(&acdev->dma_completion); in dma_callback()
366 struct ata_queued_cmd *qc = acdev->qc; in dma_complete()
369 acdev->qc = NULL; in dma_complete()
370 ata_sff_interrupt(acdev->irq, acdev->host); in dma_complete()
372 spin_lock_irqsave(&acdev->host->lock, flags); in dma_complete()
373 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol)) in dma_complete()
374 ata_ehi_push_desc(&qc->ap->link.eh_info, "DMA Failed: Timeout"); in dma_complete()
375 spin_unlock_irqrestore(&acdev->host->lock, flags); in dma_complete()
380 if (!wait_for_completion_timeout(&acdev->cf_completion, TIMEOUT)) { in wait4buf()
381 u32 rw = acdev->qc->tf.flags & ATA_TFLAG_WRITE; in wait4buf()
383 dev_err(acdev->host->dev, "%s TimeOut", rw ? "write" : "read"); in wait4buf()
384 return -ETIMEDOUT; in wait4buf()
387 /* Check if PIO Error interrupt has occurred */ in wait4buf()
388 if (acdev->dma_status & ATA_DMA_ERR) in wait4buf()
389 return -EAGAIN; in wait4buf()
398 struct dma_chan *chan = acdev->dma_chan; in dma_xfer()
403 tx = chan->device->device_prep_dma_memcpy(chan, dest, src, len, flags); in dma_xfer()
405 dev_err(acdev->host->dev, "device_prep_dma_memcpy failed\n"); in dma_xfer()
406 return -EAGAIN; in dma_xfer()
409 tx->callback = dma_callback; in dma_xfer()
410 tx->callback_param = acdev; in dma_xfer()
411 cookie = tx->tx_submit(tx); in dma_xfer()
415 dev_err(acdev->host->dev, "dma_submit_error\n"); in dma_xfer()
419 chan->device->device_issue_pending(chan); in dma_xfer()
422 if (!wait_for_completion_timeout(&acdev->dma_completion, TIMEOUT)) { in dma_xfer()
424 dev_err(acdev->host->dev, "wait_for_completion_timeout\n"); in dma_xfer()
425 return -ETIMEDOUT; in dma_xfer()
435 u32 write = acdev->qc->tf.flags & ATA_TFLAG_WRITE; in sg_xfer()
442 dest = acdev->pbase + EXT_WRITE_PORT; in sg_xfer()
445 src = acdev->pbase + EXT_READ_PORT; in sg_xfer()
450 * MAX_XFER_COUNT data will be transferred before we get transfer in sg_xfer()
457 spin_lock_irqsave(&acdev->host->lock, flags); in sg_xfer()
458 xfer_ctr = readl(acdev->vbase + XFER_CTR) & in sg_xfer()
461 acdev->vbase + XFER_CTR); in sg_xfer()
462 spin_unlock_irqrestore(&acdev->host->lock, flags); in sg_xfer()
477 dev_err(acdev->host->dev, "dma failed"); in sg_xfer()
486 sglen -= dma_len; in sg_xfer()
487 xfer_cnt -= dma_len; in sg_xfer()
499 spin_lock_irqsave(&acdev->host->lock, flags); in sg_xfer()
500 writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START, in sg_xfer()
501 acdev->vbase + XFER_CTR); in sg_xfer()
502 spin_unlock_irqrestore(&acdev->host->lock, flags); in sg_xfer()
510 * - buf_avail: This interrupt is generated as soon as we have buffer of 512
512 * - xfer_done: This interrupt is generated on transfer of "xfer_size" amount of
522 struct ata_queued_cmd *qc = acdev->qc; in data_xfer()
530 acdev->dma_chan = dma_request_chan(acdev->host->dev, "data"); in data_xfer()
531 if (IS_ERR(acdev->dma_chan)) { in data_xfer()
532 dev_err(acdev->host->dev, "Unable to get dma_chan\n"); in data_xfer()
533 acdev->dma_chan = NULL; in data_xfer()
537 for_each_sg(qc->sg, sg, qc->n_elem, temp) { in data_xfer()
543 dma_release_channel(acdev->dma_chan); in data_xfer()
544 acdev->dma_chan = NULL; in data_xfer()
550 spin_lock_irqsave(&acdev->host->lock, flags); in data_xfer()
551 status = ioread8(qc->ap->ioaddr.altstatus_addr); in data_xfer()
552 spin_unlock_irqrestore(&acdev->host->lock, flags); in data_xfer()
554 ata_sff_queue_delayed_work(&acdev->dwork, 1); in data_xfer()
564 spin_lock_irqsave(&acdev->host->lock, flags); in data_xfer()
566 qc->err_mask |= AC_ERR_HOST_BUS; in data_xfer()
567 qc->ap->hsm_task_state = HSM_ST_ERR; in data_xfer()
570 spin_unlock_irqrestore(&acdev->host->lock, flags); in data_xfer()
579 struct ata_queued_cmd *qc = acdev->qc; in delayed_finish()
583 spin_lock_irqsave(&acdev->host->lock, flags); in delayed_finish()
584 status = ioread8(qc->ap->ioaddr.altstatus_addr); in delayed_finish()
585 spin_unlock_irqrestore(&acdev->host->lock, flags); in delayed_finish()
588 ata_sff_queue_delayed_work(&acdev->dwork, 1); in delayed_finish()
595 struct arasan_cf_dev *acdev = ((struct ata_host *)dev)->private_data; in arasan_cf_interrupt()
599 irqsts = readl(acdev->vbase + GIRQ_STS); in arasan_cf_interrupt()
603 spin_lock_irqsave(&acdev->host->lock, flags); in arasan_cf_interrupt()
604 irqsts = readl(acdev->vbase + IRQ_STS); in arasan_cf_interrupt()
605 writel(irqsts, acdev->vbase + IRQ_STS); /* clear irqs */ in arasan_cf_interrupt()
606 writel(GIRQ_CF, acdev->vbase + GIRQ_STS); /* clear girqs */ in arasan_cf_interrupt()
613 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_interrupt()
618 acdev->dma_status = ATA_DMA_ERR; in arasan_cf_interrupt()
619 writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START, in arasan_cf_interrupt()
620 acdev->vbase + XFER_CTR); in arasan_cf_interrupt()
621 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_interrupt()
622 complete(&acdev->cf_completion); in arasan_cf_interrupt()
623 dev_err(acdev->host->dev, "pio xfer err irq\n"); in arasan_cf_interrupt()
627 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_interrupt()
630 complete(&acdev->cf_completion); in arasan_cf_interrupt()
635 struct ata_queued_cmd *qc = acdev->qc; in arasan_cf_interrupt()
638 if (qc->tf.flags & ATA_TFLAG_WRITE) in arasan_cf_interrupt()
639 complete(&acdev->cf_completion); in arasan_cf_interrupt()
647 struct arasan_cf_dev *acdev = ap->host->private_data; in arasan_cf_freeze()
649 /* stop transfer and reset controller */ in arasan_cf_freeze()
650 writel(readl(acdev->vbase + XFER_CTR) & ~XFER_START, in arasan_cf_freeze()
651 acdev->vbase + XFER_CTR); in arasan_cf_freeze()
653 acdev->dma_status = ATA_DMA_ERR; in arasan_cf_freeze()
661 struct arasan_cf_dev *acdev = ap->host->private_data; in arasan_cf_error_handler()
668 cancel_work_sync(&acdev->work); in arasan_cf_error_handler()
669 cancel_delayed_work_sync(&acdev->dwork); in arasan_cf_error_handler()
675 struct ata_queued_cmd *qc = acdev->qc; in arasan_cf_dma_start()
676 struct ata_port *ap = qc->ap; in arasan_cf_dma_start()
677 struct ata_taskfile *tf = &qc->tf; in arasan_cf_dma_start()
678 u32 xfer_ctr = readl(acdev->vbase + XFER_CTR) & ~XFER_DIR_MASK; in arasan_cf_dma_start()
679 u32 write = tf->flags & ATA_TFLAG_WRITE; in arasan_cf_dma_start()
682 writel(xfer_ctr, acdev->vbase + XFER_CTR); in arasan_cf_dma_start()
684 ap->ops->sff_exec_command(ap, tf); in arasan_cf_dma_start()
685 ata_sff_queue_work(&acdev->work); in arasan_cf_dma_start()
690 struct ata_port *ap = qc->ap; in arasan_cf_qc_issue()
691 struct arasan_cf_dev *acdev = ap->host->private_data; in arasan_cf_qc_issue()
693 /* defer PIO handling to sff_qc_issue */ in arasan_cf_qc_issue()
694 if (!ata_is_dma(qc->tf.protocol)) in arasan_cf_qc_issue()
699 ata_sff_dev_select(ap, qc->dev->devno); in arasan_cf_qc_issue()
703 switch (qc->tf.protocol) { in arasan_cf_qc_issue()
705 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING); in arasan_cf_qc_issue()
707 trace_ata_tf_load(ap, &qc->tf); in arasan_cf_qc_issue()
708 ap->ops->sff_tf_load(ap, &qc->tf); in arasan_cf_qc_issue()
709 acdev->dma_status = 0; in arasan_cf_qc_issue()
710 acdev->qc = qc; in arasan_cf_qc_issue()
711 trace_ata_bmdma_start(ap, &qc->tf, qc->tag); in arasan_cf_qc_issue()
713 ap->hsm_task_state = HSM_ST_LAST; in arasan_cf_qc_issue()
726 struct arasan_cf_dev *acdev = ap->host->private_data; in arasan_cf_set_piomode()
727 u8 pio = adev->pio_mode - XFER_PIO_0; in arasan_cf_set_piomode() local
731 /* Arasan ctrl supports Mode0 -> Mode6 */ in arasan_cf_set_piomode()
732 if (pio > 6) { in arasan_cf_set_piomode()
733 dev_err(ap->dev, "Unknown PIO mode\n"); in arasan_cf_set_piomode()
737 spin_lock_irqsave(&acdev->host->lock, flags); in arasan_cf_set_piomode()
738 val = readl(acdev->vbase + OP_MODE) & in arasan_cf_set_piomode()
740 writel(val, acdev->vbase + OP_MODE); in arasan_cf_set_piomode()
741 val = readl(acdev->vbase + TM_CFG) & ~TRUEIDE_PIO_TIMING_MASK; in arasan_cf_set_piomode()
742 val |= pio << TRUEIDE_PIO_TIMING_SHIFT; in arasan_cf_set_piomode()
743 writel(val, acdev->vbase + TM_CFG); in arasan_cf_set_piomode()
747 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_set_piomode()
752 struct arasan_cf_dev *acdev = ap->host->private_data; in arasan_cf_set_dmamode()
753 u32 opmode, tmcfg, dma_mode = adev->dma_mode; in arasan_cf_set_dmamode()
756 spin_lock_irqsave(&acdev->host->lock, flags); in arasan_cf_set_dmamode()
757 opmode = readl(acdev->vbase + OP_MODE) & in arasan_cf_set_dmamode()
759 tmcfg = readl(acdev->vbase + TM_CFG); in arasan_cf_set_dmamode()
764 tmcfg |= (dma_mode - XFER_UDMA_0) << ULTRA_DMA_TIMING_SHIFT; in arasan_cf_set_dmamode()
768 tmcfg |= (dma_mode - XFER_MW_DMA_0) << in arasan_cf_set_dmamode()
771 dev_err(ap->dev, "Unknown DMA mode\n"); in arasan_cf_set_dmamode()
772 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_set_dmamode()
776 writel(opmode, acdev->vbase + OP_MODE); in arasan_cf_set_dmamode()
777 writel(tmcfg, acdev->vbase + TM_CFG); in arasan_cf_set_dmamode()
778 writel(DMA_XFER_MODE, acdev->vbase + XFER_CTR); in arasan_cf_set_dmamode()
782 spin_unlock_irqrestore(&acdev->host->lock, flags); in arasan_cf_set_dmamode()
797 struct arasan_cf_pdata *pdata = dev_get_platdata(&pdev->dev); in arasan_cf_probe()
807 return -EINVAL; in arasan_cf_probe()
809 if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res), in arasan_cf_probe()
811 dev_warn(&pdev->dev, "Failed to get memory region resource\n"); in arasan_cf_probe()
812 return -ENOENT; in arasan_cf_probe()
815 acdev = devm_kzalloc(&pdev->dev, sizeof(*acdev), GFP_KERNEL); in arasan_cf_probe()
817 return -ENOMEM; in arasan_cf_probe()
820 quirk = pdata->quirk; in arasan_cf_probe()
826 * support only PIO in arasan_cf_probe()
830 acdev->irq = ret; in arasan_cf_probe()
832 } else if (ret == -EPROBE_DEFER) { in arasan_cf_probe()
838 acdev->pbase = res->start; in arasan_cf_probe()
839 acdev->vbase = devm_ioremap(&pdev->dev, res->start, in arasan_cf_probe()
841 if (!acdev->vbase) { in arasan_cf_probe()
842 dev_warn(&pdev->dev, "ioremap fail\n"); in arasan_cf_probe()
843 return -ENOMEM; in arasan_cf_probe()
846 acdev->clk = devm_clk_get(&pdev->dev, NULL); in arasan_cf_probe()
847 if (IS_ERR(acdev->clk)) { in arasan_cf_probe()
848 dev_warn(&pdev->dev, "Clock not found\n"); in arasan_cf_probe()
849 return PTR_ERR(acdev->clk); in arasan_cf_probe()
853 host = ata_host_alloc(&pdev->dev, 1); in arasan_cf_probe()
855 dev_warn(&pdev->dev, "alloc host fail\n"); in arasan_cf_probe()
856 return -ENOMEM; in arasan_cf_probe()
859 ap = host->ports[0]; in arasan_cf_probe()
860 host->private_data = acdev; in arasan_cf_probe()
861 acdev->host = host; in arasan_cf_probe()
862 ap->ops = &arasan_cf_ops; in arasan_cf_probe()
863 ap->pio_mask = ATA_PIO6; in arasan_cf_probe()
864 ap->mwdma_mask = ATA_MWDMA4; in arasan_cf_probe()
865 ap->udma_mask = ATA_UDMA6; in arasan_cf_probe()
867 init_completion(&acdev->cf_completion); in arasan_cf_probe()
868 init_completion(&acdev->dma_completion); in arasan_cf_probe()
869 INIT_WORK(&acdev->work, data_xfer); in arasan_cf_probe()
870 INIT_DELAYED_WORK(&acdev->dwork, delayed_finish); in arasan_cf_probe()
871 dma_cap_set(DMA_MEMCPY, acdev->mask); in arasan_cf_probe()
876 ap->ops->set_piomode = NULL; in arasan_cf_probe()
877 ap->pio_mask = 0; in arasan_cf_probe()
880 ap->mwdma_mask = 0; in arasan_cf_probe()
882 ap->udma_mask = 0; in arasan_cf_probe()
884 ap->flags |= ATA_FLAG_PIO_POLLING | ATA_FLAG_NO_ATAPI; in arasan_cf_probe()
886 ap->ioaddr.cmd_addr = acdev->vbase + ATA_DATA_PORT; in arasan_cf_probe()
887 ap->ioaddr.data_addr = acdev->vbase + ATA_DATA_PORT; in arasan_cf_probe()
888 ap->ioaddr.error_addr = acdev->vbase + ATA_ERR_FTR; in arasan_cf_probe()
889 ap->ioaddr.feature_addr = acdev->vbase + ATA_ERR_FTR; in arasan_cf_probe()
890 ap->ioaddr.nsect_addr = acdev->vbase + ATA_SC; in arasan_cf_probe()
891 ap->ioaddr.lbal_addr = acdev->vbase + ATA_SN; in arasan_cf_probe()
892 ap->ioaddr.lbam_addr = acdev->vbase + ATA_CL; in arasan_cf_probe()
893 ap->ioaddr.lbah_addr = acdev->vbase + ATA_CH; in arasan_cf_probe()
894 ap->ioaddr.device_addr = acdev->vbase + ATA_SH; in arasan_cf_probe()
895 ap->ioaddr.status_addr = acdev->vbase + ATA_STS_CMD; in arasan_cf_probe()
896 ap->ioaddr.command_addr = acdev->vbase + ATA_STS_CMD; in arasan_cf_probe()
897 ap->ioaddr.altstatus_addr = acdev->vbase + ATA_ASTS_DCTR; in arasan_cf_probe()
898 ap->ioaddr.ctl_addr = acdev->vbase + ATA_ASTS_DCTR; in arasan_cf_probe()
901 (unsigned long long) res->start, acdev->vbase); in arasan_cf_probe()
909 ret = ata_host_activate(host, acdev->irq, irq_handler, 0, in arasan_cf_probe()
922 struct arasan_cf_dev *acdev = host->ports[0]->private_data; in arasan_cf_remove()
934 struct arasan_cf_dev *acdev = host->ports[0]->private_data; in arasan_cf_suspend()
936 if (acdev->dma_chan) in arasan_cf_suspend()
937 dmaengine_terminate_all(acdev->dma_chan); in arasan_cf_suspend()
947 struct arasan_cf_dev *acdev = host->ports[0]->private_data; in arasan_cf_resume()
960 { .compatible = "arasan,cf-spear1340" },