34  * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix
51  *	ICH2	errata #21	- DMA mode 0 doesn't work right
65  *				  (BIOS must set dev 31 fn 0 bit 23)
86 	PIIX_IOCFG		= 0x54, /* IDE I/O configuration register */
87 	ICH5_PMR		= 0x90, /* address map register */
88 	ICH5_PCS		= 0x92,	/* port control and status */
91 	PIIX_SIDPR_IDX		= 0,
106 	P0			= 0,  /* port 0 */
157 	{ 0x8086, 0x7010, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_mwdma },
159 	{ 0x8086, 0x7111, 0x15ad, 0x1976, 0, 0, piix_pata_vmw },
162 	{ 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
164 	{ 0x8086, 0x7199, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
166 	{ 0x8086, 0x7601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
168 	{ 0x8086, 0x84CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
170 	{ 0x8086, 0x2411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_66 },
172 	{ 0x8086, 0x2421, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_33 },
174 	{ 0x8086, 0x244A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
176 	{ 0x8086, 0x244B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
178 	{ 0x8086, 0x248A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
180 	{ 0x8086, 0x248B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
182 	{ 0x8086, 0x24C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
184 	{ 0x8086, 0x24CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
185 	{ 0x8086, 0x24CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
187 	{ 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
189 	{ 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
191 	{ 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
193 	{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
195 	{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
196 	{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },
198 	{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
203 	{ 0x8086, 0x24d1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
205 	{ 0x8086, 0x24df, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
207 	{ 0x8086, 0x25a3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
209 	{ 0x8086, 0x25b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich5_sata },
211 	{ 0x8086, 0x2651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
213 	{ 0x8086, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
214 	/* 82801FBM ICH6M (ICH6R with only port 0 and 2 implemented).
216 	{ 0x8086, 0x2653, PCI_ANY_ID, PCI_ANY_ID,
217 	  PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
219 	{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
221 	{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
223 	{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
225 	{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
227 	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
229 	{ 0x8086, 0x2828, 0x106b, 0x00a0, 0, 0, ich8m_apple_sata },
230 	{ 0x8086, 0x2828, 0x106b, 0x00a1, 0, 0, ich8m_apple_sata },
231 	{ 0x8086, 0x2828, 0x106b, 0x00a3, 0, 0, ich8m_apple_sata },
233 	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
235 	{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
237 	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
239 	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
241 	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
243 	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
245 	{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
247 	{ 0x8086, 0x5028, PCI_ANY_ID, PCI_ANY_ID, 0, 0, tolapai_sata },
249 	{ 0x8086, 0x3a00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
251 	{ 0x8086, 0x3a06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
253 	{ 0x8086, 0x3a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
255 	{ 0x8086, 0x3a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
257 	{ 0x8086, 0x3b20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
259 	{ 0x8086, 0x3b21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
261 	{ 0x8086, 0x3b26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
263 	{ 0x8086, 0x3b28, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
265 	{ 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
267 	{ 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
269 	{ 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
271 	{ 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
273 	{ 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
275 	{ 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
277 	{ 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
279 	{ 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
281 	{ 0x8086, 0x1e00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
283 	{ 0x8086, 0x1e01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
285 	{ 0x8086, 0x1e08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
287 	{ 0x8086, 0x1e09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
289 	{ 0x8086, 0x8c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
291 	{ 0x8086, 0x8c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
293 	{ 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
295 	{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
297 	{ 0x8086, 0x9c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
299 	{ 0x8086, 0x9c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
301 	{ 0x8086, 0x9c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
303 	{ 0x8086, 0x9c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
305 	{ 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
307 	{ 0x8086, 0x1f20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
309 	{ 0x8086, 0x1f21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
311 	{ 0x8086, 0x1f30, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
313 	{ 0x8086, 0x1f31, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
315 	{ 0x8086, 0x8d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
317 	{ 0x8086, 0x8d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
319 	{ 0x8086, 0x8d60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
321 	{ 0x8086, 0x8d68, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
323 	{ 0x8086, 0x0F20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
324 	{ 0x8086, 0x0F21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_byt },
326 	{ 0x8086, 0x23a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
328 	{ 0x8086, 0x8c88, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
330 	{ 0x8086, 0x8c89, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata_snb },
332 	{ 0x8086, 0x8c80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
334 	{ 0x8086, 0x8c81, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
340 	.mask = 0x7,
341 	.port_enable = 0x3,
356 	.mask = 0x3,
357 	.port_enable = 0xf,
368 	.mask = 0x3,
369 	.port_enable = 0x5,
385 	.mask = 0x3,
386 	.port_enable = 0xf,
397 	.mask = 0x3,
398 	.port_enable = 0x3,
409 	.mask = 0x3,
410 	.port_enable = 0x1,
421 	.mask = 0x3,
422 	.port_enable = 0x3,
446 	{ 0x41U, 1U, 0x80UL, 0x80UL },	/* port 0 */
447 	{ 0x43U, 1U, 0x80UL, 0x80UL },	/* port 1 */
468 	{ 0x27DF, 0x0005, 0x0280 },	/* ICH7 on Acer 5602WLMi */
469 	{ 0x27DF, 0x1025, 0x0102 },	/* ICH7 on Acer 5602aWLMi */
470 	{ 0x27DF, 0x1025, 0x0110 },	/* ICH7 on Acer 3682WLMi */
471 	{ 0x27DF, 0x1028, 0x02b0 },	/* ICH7 on unknown Dell */
472 	{ 0x27DF, 0x1043, 0x1267 },	/* ICH7 on Asus W5F */
473 	{ 0x27DF, 0x103C, 0x30A1 },	/* ICH7 on HP Compaq nc2400 */
474 	{ 0x27DF, 0x103C, 0x361a },	/* ICH7 on unknown HP  */
475 	{ 0x27DF, 0x1071, 0xD221 },	/* ICH7 on Hercules EC-900 */
476 	{ 0x27DF, 0x152D, 0x0778 },	/* ICH7 on unknown Intel */
477 	{ 0x24CA, 0x1025, 0x0061 },	/* ICH4 on ACER Aspire 2023WLMi */
478 	{ 0x24CA, 0x1025, 0x003d },	/* ICH4 on ACER TM290 */
479 	{ 0x24CA, 0x10CF, 0x11AB },	/* ICH4M on Fujitsu-Siemens Lifebook S6120 */
480 	{ 0x266F, 0x1025, 0x0066 },	/* ICH6 on ACER Aspire 1694WLMi */
481 	{ 0x2653, 0x1043, 0x82D8 },	/* ICH6M on Asus Eee 701 */
482 	{ 0x27df, 0x104d, 0x900e },	/* ICH7 on Sony TZ-90 */
484 	{ 0, }
510 	const struct ich_laptop *lap = &ich_laptop[0];  in ich_pata_cable_detect()
524 	mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;  in ich_pata_cable_detect()
525 	if ((hpriv->saved_iocfg & mask) == 0)  in ich_pata_cable_detect()
555 	unsigned int is_slave	= (adev->devno != 0);  in piix_set_timings()
556 	unsigned int master_port= ap->port_no ? 0x42 : 0x40;  in piix_set_timings()
557 	unsigned int slave_port	= 0x44;  in piix_set_timings()
561 	int control = 0;  in piix_set_timings()
569 	u8 timings[][2]	= { { 0, 0 },  in piix_set_timings()
570 			    { 0, 0 },  in piix_set_timings()
571 			    { 1, 0 },  in piix_set_timings()
599 		master_data &= 0xff0f;  in piix_set_timings()
603 		slave_data &= (ap->port_no ? 0x0f : 0xf0);  in piix_set_timings()
605 		slave_data |= ((timings[pio][0] << 2) | timings[pio][1])  in piix_set_timings()
606 						<< (ap->port_no ? 4 : 0);  in piix_set_timings()
609 		master_data &= 0xccf0;  in piix_set_timings()
614 			(timings[pio][0] << 12) |  in piix_set_timings()
619 	master_data |= 0x4000;  in piix_set_timings()
628 		pci_read_config_byte(dev, 0x48, &udma_enable);  in piix_set_timings()
630 		pci_write_config_byte(dev, 0x48, udma_enable);  in piix_set_timings()
670 	u8 udma_enable		= 0;  in do_pata_set_dmamode()
680 		pci_read_config_byte(dev, 0x48, &udma_enable);  in do_pata_set_dmamode()
691 			u_clock = 0x1000;	/* 100Mhz */  in do_pata_set_dmamode()
695 			u_clock = 0;		/* 33Mhz */  in do_pata_set_dmamode()
700 		pci_read_config_word(dev, 0x4A, &udma_timing);  in do_pata_set_dmamode()
703 		pci_write_config_word(dev, 0x4A, udma_timing);  in do_pata_set_dmamode()
707 			pci_read_config_word(dev, 0x54, &ideconf);  in do_pata_set_dmamode()
708 			ideconf &= ~(0x1001 << devid);  in do_pata_set_dmamode()
712 			pci_write_config_word(dev, 0x54, ideconf);  in do_pata_set_dmamode()
715 		pci_write_config_byte(dev, 0x48, udma_enable);  in do_pata_set_dmamode()
744 	do_pata_set_dmamode(ap, adev, 0);  in piix_set_dmamode()
772 	[SCR_STATUS]	= 0,
796 	return 0;  in piix_sidpr_scr_read()
809 	return 0;  in piix_sidpr_scr_write()
989 	return 0;  in piix_broken_suspend()
1021 	return 0;  in piix_pci_device_suspend()
1050 	if (rc == 0)  in piix_pci_device_resume()
1116 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1124 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1232 		.mwdma_mask	= ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
1272 #define AHCI_GLOBAL_CTL 0x04
1278 	int rc = 0;  in piix_disable_ahci()
1286 		return 0;  in piix_disable_ahci()
1318 	int no_piix_dma = 0;  in piix_check_450nx_errata()
1323 		pci_read_config_word(pdev, 0x41, &cfg);  in piix_check_450nx_errata()
1325 		if (pdev->revision == 0x00)  in piix_check_450nx_errata()
1361 	int i, invalid_map = 0;  in piix_init_sata_map()
1370 	for (i = 0; i < 4; i++) {  in piix_init_sata_map()
1425 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2920 &&  in piix_no_sidpr()
1427 	    pdev->subsystem_device == 0xb049) {  in piix_no_sidpr()
1440 	struct ata_link *link0 = &host->ports[0]->link;  in piix_init_sidpr()
1445 	for (i = 0; i < 4; i++)  in piix_init_sidpr()
1447 			return 0;  in piix_init_sidpr()
1451 		return 0;  in piix_init_sidpr()
1453 	if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))  in piix_init_sidpr()
1454 		return 0;  in piix_init_sidpr()
1456 	if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 ||  in piix_init_sidpr()
1458 		return 0;  in piix_init_sidpr()
1461 		return 0;  in piix_init_sidpr()
1475 	if ((scontrol & 0xf00) != 0x300) {  in piix_init_sidpr()
1476 		scontrol |= 0x300;  in piix_init_sidpr()
1480 		if ((scontrol & 0xf00) != 0x300) {  in piix_init_sidpr()
1483 			return 0;  in piix_init_sidpr()
1488 	for (i = 0; i < 2; i++) {  in piix_init_sidpr()
1500 	return 0;  in piix_init_sidpr()
1547 			.driver_data = (void *)0x1FUL,  in piix_broken_system_poweroff()
1556 			.driver_data = (void *)0x1FUL,  in piix_broken_system_poweroff()
1573 module_param(prefer_ms_hyperv, int, 0);
1576 	"0 - Use ATA drivers, "
1647 	const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] };  in piix_init_one()
1668 	port_info[0] = piix_port_info[ent->driver_data];  in piix_init_one()
1671 	port_flags = port_info[0].flags;  in piix_init_one()
1693 	if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x2652) {  in piix_init_one()
1715 		if (host->ports[0]->ops == &piix_sidpr_sata_ops)  in piix_init_one()
1735 		host->ports[0]->mwdma_mask = 0;  in piix_init_one()
1736 		host->ports[0]->udma_mask = 0;  in piix_init_one()
1737 		host->ports[1]->mwdma_mask = 0;  in piix_init_one()
1738 		host->ports[1]->udma_mask = 0;  in piix_init_one()
1778 	in_module_init = 0;  in piix_init()
1780 	return 0;  in piix_init()