Lines Matching refs:reg_base

63 	struct ccsr_ahci *reg_base;  member
169 void __iomem *reg_base = hpriv->mmio; in ahci_qoriq_phy_init() local
177 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
178 writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
179 writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
180 writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4); in ahci_qoriq_phy_init()
181 writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5); in ahci_qoriq_phy_init()
182 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
185 reg_base + LS1021A_AXICC_ADDR); in ahci_qoriq_phy_init()
195 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
196 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
197 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
198 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
200 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
204 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
205 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
206 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
207 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
209 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
219 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
220 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
221 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
222 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
224 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
236 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
237 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
238 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
239 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
241 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()
245 writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); in ahci_qoriq_phy_init()
246 writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2); in ahci_qoriq_phy_init()
247 writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3); in ahci_qoriq_phy_init()
248 writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); in ahci_qoriq_phy_init()
250 writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC); in ahci_qoriq_phy_init()