1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <linux/hwmon-sysfs.h>
24 #define DRV_NAME "ahci-imx"
27 	/* Timer 1-ms Register */
104 	struct regmap *gpr;  member
113 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
137 	} while (--timeout);  in imx_phy_crbit_assert()
139 	return timeout ? 0 : -ETIMEDOUT;  in imx_phy_crbit_assert()
227 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_phy_reset()
228 	void __iomem *mmio = hpriv->mmio;  in imx_sata_phy_reset()
233 	if (imxpriv->type == AHCI_IMX6QP) {  in imx_sata_phy_reset()
235 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
238 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
241 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_phy_reset()
266 	} while (--timeout);  in imx_sata_phy_reset()
268 	return timeout ? 0 : -ETIMEDOUT;  in imx_sata_phy_reset()
336 	void __iomem *mmio = hpriv->mmio;  in __sata_ahci_read_temperature()
338 	/* check rd-wr to reg */  in __sata_ahci_read_temperature()
413 	a = (m2 - m1) / (m2/1000);  in __sata_ahci_read_temperature()
414 	*temp = ((-559) * a * a) / 1000 + (1379) * a + (-458000);  in __sata_ahci_read_temperature()
421 	return __sata_ahci_read_temperature(tz->devdata, temp);  in sata_ahci_read_temperature()
454 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx8_sata_enable()
455 	struct device *dev = &imxpriv->ahci_pdev->dev;  in imx8_sata_enable()
458 	ret = clk_prepare_enable(imxpriv->phy_pclk0);  in imx8_sata_enable()
463 	ret = clk_prepare_enable(imxpriv->phy_pclk1);  in imx8_sata_enable()
468 	ret = clk_prepare_enable(imxpriv->epcs_tx_clk);  in imx8_sata_enable()
473 	ret = clk_prepare_enable(imxpriv->epcs_rx_clk);  in imx8_sata_enable()
478 	ret = clk_prepare_enable(imxpriv->phy_apbclk);  in imx8_sata_enable()
484 	regmap_read(imxpriv->gpr, IMX8QM_CSR_PCIEA_OFFSET +  in imx8_sata_enable()
488 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
495 	regmap_read(imxpriv->gpr, IMX8QM_CSR_PCIEB_OFFSET +  in imx8_sata_enable()
499 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
508 		regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
517 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
521 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
527 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
536 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
540 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
544 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
557 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
569 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
574 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
579 	/* CTRL RST: SET -> delay 1 us -> CLEAR -> SET */  in imx8_sata_enable()
580 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
585 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
589 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
595 	regmap_update_bits(imxpriv->gpr,  in imx8_sata_enable()
603 		regmap_read(imxpriv->gpr, reg, &val);  in imx8_sata_enable()
612 		ret = -ENODEV;  in imx8_sata_enable()
614 		writeb(imxpriv->imped_ratio, imxpriv->phy_base +  in imx8_sata_enable()
616 		writeb(imxpriv->imped_ratio, imxpriv->phy_base +  in imx8_sata_enable()
618 		reg = readb(imxpriv->phy_base +  in imx8_sata_enable()
620 		if (unlikely(reg != imxpriv->imped_ratio))  in imx8_sata_enable()
622 		reg = readb(imxpriv->phy_base +  in imx8_sata_enable()
624 		if (unlikely(reg != imxpriv->imped_ratio))  in imx8_sata_enable()
632 		clk_disable_unprepare(imxpriv->phy_apbclk);  in imx8_sata_enable()
633 		clk_disable_unprepare(imxpriv->phy_pclk1);  in imx8_sata_enable()
634 		clk_disable_unprepare(imxpriv->phy_pclk0);  in imx8_sata_enable()
638 	clk_disable_unprepare(imxpriv->phy_apbclk);  in imx8_sata_enable()
640 	clk_disable_unprepare(imxpriv->epcs_rx_clk);  in imx8_sata_enable()
642 	clk_disable_unprepare(imxpriv->epcs_tx_clk);  in imx8_sata_enable()
644 	clk_disable_unprepare(imxpriv->phy_pclk1);  in imx8_sata_enable()
646 	clk_disable_unprepare(imxpriv->phy_pclk0);  in imx8_sata_enable()
653 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_enable()
654 	struct device *dev = &imxpriv->ahci_pdev->dev;  in imx_sata_enable()
657 	if (imxpriv->no_device)  in imx_sata_enable()
664 	ret = clk_prepare_enable(imxpriv->sata_ref_clk);  in imx_sata_enable()
668 	if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) {  in imx_sata_enable()
675 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_enable()
686 				   imxpriv->phy_params);  in imx_sata_enable()
687 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_enable()
698 	} else if (imxpriv->type == AHCI_IMX8QM) {  in imx_sata_enable()
707 	clk_disable_unprepare(imxpriv->sata_ref_clk);  in imx_sata_enable()
716 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in imx_sata_disable()
718 	if (imxpriv->no_device)  in imx_sata_disable()
721 	switch (imxpriv->type) {  in imx_sata_disable()
723 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR5,  in imx_sata_disable()
726 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_disable()
732 		regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,  in imx_sata_disable()
738 		clk_disable_unprepare(imxpriv->epcs_rx_clk);  in imx_sata_disable()
739 		clk_disable_unprepare(imxpriv->epcs_tx_clk);  in imx_sata_disable()
746 	clk_disable_unprepare(imxpriv->sata_ref_clk);  in imx_sata_disable()
755 	struct ata_host *host = dev_get_drvdata(ap->dev);  in ahci_imx_error_handler()
756 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_error_handler()
757 	void __iomem *mmio = hpriv->mmio;  in ahci_imx_error_handler()
758 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_error_handler()
762 	if (!(imxpriv->first_time) || ahci_imx_hotplug)  in ahci_imx_error_handler()
765 	imxpriv->first_time = false;  in ahci_imx_error_handler()
767 	ata_for_each_dev(dev, &ap->link, ENABLED)  in ahci_imx_error_handler()
777 	imxpriv->no_device = true;  in ahci_imx_error_handler()
779 	dev_info(ap->dev, "no device found, disabling link.\n");  in ahci_imx_error_handler()
780 	dev_info(ap->dev, "pass " MODULE_PARAM_PREFIX ".hotplug=1 to enable hotplug\n");  in ahci_imx_error_handler()
786 	struct ata_port *ap = link->ap;  in ahci_imx_softreset()
787 	struct ata_host *host = dev_get_drvdata(ap->dev);  in ahci_imx_softreset()
788 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_softreset()
789 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_softreset()
792 	if (imxpriv->type == AHCI_IMX53)  in ahci_imx_softreset()
815 	{ .compatible = "fsl,imx53-ahci", .data = (void *)AHCI_IMX53 },
816 	{ .compatible = "fsl,imx6q-ahci", .data = (void *)AHCI_IMX6Q },
817 	{ .compatible = "fsl,imx6qp-ahci", .data = (void *)AHCI_IMX6QP },
818 	{ .compatible = "fsl,imx8qm-ahci", .data = (void *)AHCI_IMX8QM },
912 		.name = "fsl,transmit-level-mV",
917 		.name = "fsl,transmit-boost-mdB",
922 		.name = "fsl,transmit-atten-16ths",
927 		.name = "fsl,receive-eq-mdB",
932 		.name = "fsl,no-spread-spectrum",
941 	struct device_node *np = dev->of_node;  in imx_ahci_parse_props()
948 		if (prop->num_values == 0) {  in imx_ahci_parse_props()
949 			if (of_property_read_bool(np, prop->name))  in imx_ahci_parse_props()
950 				reg_value |= prop->set_value;  in imx_ahci_parse_props()
952 				reg_value |= prop->def_value;  in imx_ahci_parse_props()
956 		if (of_property_read_u32(np, prop->name, &of_val)) {  in imx_ahci_parse_props()
958 				prop->name, prop->def_value);  in imx_ahci_parse_props()
959 			reg_value |= prop->def_value;  in imx_ahci_parse_props()
963 		for (j = 0; j < prop->num_values; j++) {  in imx_ahci_parse_props()
964 			if (prop->values[j].of_value == of_val) {  in imx_ahci_parse_props()
966 					prop->name, of_val, prop->values[j].reg_value);  in imx_ahci_parse_props()
967 				reg_value |= prop->values[j].reg_value;  in imx_ahci_parse_props()
972 		if (j == prop->num_values) {  in imx_ahci_parse_props()
974 				prop->name);  in imx_ahci_parse_props()
975 			reg_value |= prop->def_value;  in imx_ahci_parse_props()
989 	struct platform_device *pdev = imxpriv->ahci_pdev;  in imx8_sata_probe()
990 	struct device_node *np = dev->of_node;  in imx8_sata_probe()
992 	if (of_property_read_u32(np, "fsl,phy-imp", &imxpriv->imped_ratio))  in imx8_sata_probe()
993 		imxpriv->imped_ratio = IMX8QM_SATA_PHY_IMPED_RATIO_85OHM;  in imx8_sata_probe()
996 		imxpriv->phy_base = devm_ioremap(dev, phy_res->start,  in imx8_sata_probe()
998 		if (!imxpriv->phy_base) {  in imx8_sata_probe()
1000 			return -ENOMEM;  in imx8_sata_probe()
1004 		return -ENOMEM;  in imx8_sata_probe()
1006 	imxpriv->gpr =  in imx8_sata_probe()
1008 	if (IS_ERR(imxpriv->gpr)) {  in imx8_sata_probe()
1009 		dev_err(dev, "unable to find gpr registers\n");  in imx8_sata_probe()
1010 		return PTR_ERR(imxpriv->gpr);  in imx8_sata_probe()
1013 	imxpriv->epcs_tx_clk = devm_clk_get(dev, "epcs_tx");  in imx8_sata_probe()
1014 	if (IS_ERR(imxpriv->epcs_tx_clk)) {  in imx8_sata_probe()
1016 		return PTR_ERR(imxpriv->epcs_tx_clk);  in imx8_sata_probe()
1018 	imxpriv->epcs_rx_clk = devm_clk_get(dev, "epcs_rx");  in imx8_sata_probe()
1019 	if (IS_ERR(imxpriv->epcs_rx_clk)) {  in imx8_sata_probe()
1021 		return PTR_ERR(imxpriv->epcs_rx_clk);  in imx8_sata_probe()
1023 	imxpriv->phy_pclk0 = devm_clk_get(dev, "phy_pclk0");  in imx8_sata_probe()
1024 	if (IS_ERR(imxpriv->phy_pclk0)) {  in imx8_sata_probe()
1026 		return PTR_ERR(imxpriv->phy_pclk0);  in imx8_sata_probe()
1028 	imxpriv->phy_pclk1 = devm_clk_get(dev, "phy_pclk1");  in imx8_sata_probe()
1029 	if (IS_ERR(imxpriv->phy_pclk1)) {  in imx8_sata_probe()
1031 		return PTR_ERR(imxpriv->phy_pclk1);  in imx8_sata_probe()
1033 	imxpriv->phy_apbclk = devm_clk_get(dev, "phy_apbclk");  in imx8_sata_probe()
1034 	if (IS_ERR(imxpriv->phy_apbclk)) {  in imx8_sata_probe()
1036 		return PTR_ERR(imxpriv->phy_apbclk);  in imx8_sata_probe()
1040 	imxpriv->clkreq_gpiod = devm_gpiod_get_optional(dev, "clkreq",  in imx8_sata_probe()
1042 	if (IS_ERR(imxpriv->clkreq_gpiod))  in imx8_sata_probe()
1043 		return PTR_ERR(imxpriv->clkreq_gpiod);  in imx8_sata_probe()
1044 	if (imxpriv->clkreq_gpiod)  in imx8_sata_probe()
1045 		gpiod_set_consumer_name(imxpriv->clkreq_gpiod, "SATA CLKREQ");  in imx8_sata_probe()
1052 	struct device *dev = &pdev->dev;  in imx_ahci_probe()
1061 		return -EINVAL;  in imx_ahci_probe()
1065 		return -ENOMEM;  in imx_ahci_probe()
1067 	imxpriv->ahci_pdev = pdev;  in imx_ahci_probe()
1068 	imxpriv->no_device = false;  in imx_ahci_probe()
1069 	imxpriv->first_time = true;  in imx_ahci_probe()
1070 	imxpriv->type = (unsigned long)of_id->data;  in imx_ahci_probe()
1072 	imxpriv->sata_clk = devm_clk_get(dev, "sata");  in imx_ahci_probe()
1073 	if (IS_ERR(imxpriv->sata_clk)) {  in imx_ahci_probe()
1075 		return PTR_ERR(imxpriv->sata_clk);  in imx_ahci_probe()
1078 	imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref");  in imx_ahci_probe()
1079 	if (IS_ERR(imxpriv->sata_ref_clk)) {  in imx_ahci_probe()
1081 		return PTR_ERR(imxpriv->sata_ref_clk);  in imx_ahci_probe()
1084 	imxpriv->ahb_clk = devm_clk_get(dev, "ahb");  in imx_ahci_probe()
1085 	if (IS_ERR(imxpriv->ahb_clk)) {  in imx_ahci_probe()
1087 		return PTR_ERR(imxpriv->ahb_clk);  in imx_ahci_probe()
1090 	if (imxpriv->type == AHCI_IMX6Q || imxpriv->type == AHCI_IMX6QP) {  in imx_ahci_probe()
1093 		imxpriv->gpr = syscon_regmap_lookup_by_compatible(  in imx_ahci_probe()
1094 							"fsl,imx6q-iomuxc-gpr");  in imx_ahci_probe()
1095 		if (IS_ERR(imxpriv->gpr)) {  in imx_ahci_probe()
1097 				"failed to find fsl,imx6q-iomux-gpr regmap\n");  in imx_ahci_probe()
1098 			return PTR_ERR(imxpriv->gpr);  in imx_ahci_probe()
1104 		imxpriv->phy_params =  in imx_ahci_probe()
1109 	} else if (imxpriv->type == AHCI_IMX8QM) {  in imx_ahci_probe()
1119 	hpriv->plat_data = imxpriv;  in imx_ahci_probe()
1121 	ret = clk_prepare_enable(imxpriv->sata_clk);  in imx_ahci_probe()
1125 	if (imxpriv->type == AHCI_IMX53 &&  in imx_ahci_probe()
1155 	reg_val = readl(hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1158 		writel(reg_val, hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
1160 	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1163 		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
1166 	reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;  in imx_ahci_probe()
1167 	writel(reg_val, hpriv->mmio + IMX_TIMER1MS);  in imx_ahci_probe()
1179 	clk_disable_unprepare(imxpriv->sata_clk);  in imx_ahci_probe()
1185 	struct ahci_host_priv *hpriv = host->private_data;  in ahci_imx_host_stop()
1186 	struct imx_ahci_priv *imxpriv = hpriv->plat_data;  in ahci_imx_host_stop()
1189 	clk_disable_unprepare(imxpriv->sata_clk);  in ahci_imx_host_stop()
1196 	struct ahci_host_priv *hpriv = host->private_data;  in imx_ahci_suspend()
1211 	struct ahci_host_priv *hpriv = host->private_data;  in imx_ahci_resume()
1236 MODULE_AUTHOR("Richard Zhu <Hong-Xing.Zhu@freescale.com>");