Lines Matching +full:generic +full:- +full:ahci
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ahci.c - AHCI SATA support
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
14 * AHCI hardware documentation:
25 #include <linux/dma-mapping.h>
33 #include <linux/ahci-remap.h>
34 #include <linux/io-64-nonatomic-lo-hi.h>
35 #include "ahci.h"
37 #define DRV_NAME "ahci"
105 AHCI_SHT("ahci"),
257 { PCI_VDEVICE(INTEL, 0x06d6), board_ahci }, /* Comet Lake PCH-H RAID */
267 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
290 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */
291 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
294 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */
297 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
298 { PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */
299 { PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */
300 { PCI_VDEVICE(INTEL, 0x19b2), board_ahci_pcs7 }, /* DNV AHCI */
301 { PCI_VDEVICE(INTEL, 0x19b3), board_ahci_pcs7 }, /* DNV AHCI */
302 { PCI_VDEVICE(INTEL, 0x19b4), board_ahci_pcs7 }, /* DNV AHCI */
303 { PCI_VDEVICE(INTEL, 0x19b5), board_ahci_pcs7 }, /* DNV AHCI */
304 { PCI_VDEVICE(INTEL, 0x19b6), board_ahci_pcs7 }, /* DNV AHCI */
305 { PCI_VDEVICE(INTEL, 0x19b7), board_ahci_pcs7 }, /* DNV AHCI */
306 { PCI_VDEVICE(INTEL, 0x19bE), board_ahci_pcs7 }, /* DNV AHCI */
307 { PCI_VDEVICE(INTEL, 0x19bF), board_ahci_pcs7 }, /* DNV AHCI */
308 { PCI_VDEVICE(INTEL, 0x19c0), board_ahci_pcs7 }, /* DNV AHCI */
309 { PCI_VDEVICE(INTEL, 0x19c1), board_ahci_pcs7 }, /* DNV AHCI */
310 { PCI_VDEVICE(INTEL, 0x19c2), board_ahci_pcs7 }, /* DNV AHCI */
311 { PCI_VDEVICE(INTEL, 0x19c3), board_ahci_pcs7 }, /* DNV AHCI */
312 { PCI_VDEVICE(INTEL, 0x19c4), board_ahci_pcs7 }, /* DNV AHCI */
313 { PCI_VDEVICE(INTEL, 0x19c5), board_ahci_pcs7 }, /* DNV AHCI */
314 { PCI_VDEVICE(INTEL, 0x19c6), board_ahci_pcs7 }, /* DNV AHCI */
315 { PCI_VDEVICE(INTEL, 0x19c7), board_ahci_pcs7 }, /* DNV AHCI */
316 { PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */
317 { PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */
318 { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
319 { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */
324 { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
327 { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
328 { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
329 { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */
335 { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
336 { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */
343 { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */
344 { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */
351 { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */
352 { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */
353 { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */
360 { PCI_VDEVICE(INTEL, 0x1f32), board_ahci_avn }, /* Avoton AHCI */
361 { PCI_VDEVICE(INTEL, 0x1f33), board_ahci_avn }, /* Avoton AHCI */
368 { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg/Lewisburg AHCI*/
372 { PCI_VDEVICE(INTEL, 0x43d4), board_ahci }, /* Rocket Lake PCH-H RAID */
373 { PCI_VDEVICE(INTEL, 0x43d5), board_ahci }, /* Rocket Lake PCH-H RAID */
374 { PCI_VDEVICE(INTEL, 0x43d6), board_ahci }, /* Rocket Lake PCH-H RAID */
375 { PCI_VDEVICE(INTEL, 0x43d7), board_ahci }, /* Rocket Lake PCH-H RAID */
376 { PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
380 { PCI_VDEVICE(INTEL, 0x8d62), board_ahci }, /* Wellsburg AHCI */
384 { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
385 { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */
389 { PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
390 { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */
397 { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */
400 { PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
401 { PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */
402 { PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
403 { PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
405 { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
406 { PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/
410 { PCI_VDEVICE(INTEL, 0xa202), board_ahci }, /* Lewisburg AHCI*/
414 { PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */
415 { PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */
416 { PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */
417 { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */
418 { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */
419 { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */
420 { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */
421 { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */
422 { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */
428 /* JMicron 362B and 362C have an AHCI function with IDE class code */
448 { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
449 { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
452 /* AMD is using RAID class only for ahci controllers */
595 { PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
619 /* Generic, PCI class code for AHCI */
649 MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
651 static int mobile_lpm_policy = -1;
658 if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { in ahci_pci_save_initial_config()
659 dev_info(&pdev->dev, "JMB361 has only one port\n"); in ahci_pci_save_initial_config()
660 hpriv->saved_port_map = 1; in ahci_pci_save_initial_config()
665 * is asserted through the standard AHCI port in ahci_pci_save_initial_config()
668 if (hpriv->flags & AHCI_HFLAG_MV_PATA) { in ahci_pci_save_initial_config()
669 if (pdev->device == 0x6121) in ahci_pci_save_initial_config()
670 hpriv->mask_port_map = 0x3; in ahci_pci_save_initial_config()
672 hpriv->mask_port_map = 0xf; in ahci_pci_save_initial_config()
673 dev_info(&pdev->dev, in ahci_pci_save_initial_config()
674 "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); in ahci_pci_save_initial_config()
677 ahci_save_initial_config(&pdev->dev, hpriv); in ahci_pci_save_initial_config()
682 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_init_controller()
683 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_pci_init_controller()
688 if (hpriv->flags & AHCI_HFLAG_MV_PATA) { in ahci_pci_init_controller()
689 if (pdev->device == 0x6121) in ahci_pci_init_controller()
699 dev_dbg(&pdev->dev, "PORT_IRQ_STAT 0x%x\n", tmp); in ahci_pci_init_controller()
710 struct ata_port *ap = link->ap; in ahci_vt8251_hardreset()
711 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_vt8251_hardreset()
715 hpriv->stop_engine(ap); in ahci_vt8251_hardreset()
717 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), in ahci_vt8251_hardreset()
720 hpriv->start_engine(ap); in ahci_vt8251_hardreset()
723 * request follow-up softreset. in ahci_vt8251_hardreset()
725 return online ? -EAGAIN : rc; in ahci_vt8251_hardreset()
731 struct ata_port *ap = link->ap; in ahci_p5wdh_hardreset()
732 struct ahci_port_priv *pp = ap->private_data; in ahci_p5wdh_hardreset()
733 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_p5wdh_hardreset()
734 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; in ahci_p5wdh_hardreset()
739 hpriv->stop_engine(ap); in ahci_p5wdh_hardreset()
742 ata_tf_init(link->device, &tf); in ahci_p5wdh_hardreset()
746 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), in ahci_p5wdh_hardreset()
749 hpriv->start_engine(ap); in ahci_p5wdh_hardreset()
752 * ASUS P5W-DH Deluxe doesn't send signature FIS after in ahci_p5wdh_hardreset()
774 * ahci_avn_hardreset - attempt more aggressive recovery of Avoton ports.
778 * be recovered by a SATA-hard-reset alone. The failing signature is
784 * reset by bouncing "port enable" in the AHCI PCS configuration
791 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); in ahci_avn_hardreset()
792 struct ata_port *ap = link->ap; in ahci_avn_hardreset()
793 struct ahci_port_priv *pp = ap->private_data; in ahci_avn_hardreset()
794 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_avn_hardreset()
795 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; in ahci_avn_hardreset()
796 unsigned long tmo = deadline - jiffies; in ahci_avn_hardreset()
801 hpriv->stop_engine(ap); in ahci_avn_hardreset()
806 int port = ap->port_no; in ahci_avn_hardreset()
807 struct ata_host *host = ap->host; in ahci_avn_hardreset()
808 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_avn_hardreset()
811 ata_tf_init(link->device, &tf); in ahci_avn_hardreset()
833 hpriv->start_engine(ap); in ahci_avn_hardreset()
845 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_disable_interrupts()
846 void __iomem *mmio = hpriv->mmio; in ahci_pci_disable_interrupts()
849 /* AHCI spec rev1.1 section 8.3.3: in ahci_pci_disable_interrupts()
886 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_device_suspend()
888 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { in ahci_pci_device_suspend()
889 dev_err(&pdev->dev, in ahci_pci_device_suspend()
891 return -EIO; in ahci_pci_device_suspend()
909 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { in ahci_pci_device_resume()
931 * If the device fixup already set the dma_mask to some non-standard in ahci_configure_dma_masks()
935 * bogus, platform code should use dev->bus_dma_limit instead.. in ahci_configure_dma_masks()
937 if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) in ahci_configure_dma_masks()
940 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits)); in ahci_configure_dma_masks()
942 dev_err(&pdev->dev, "DMA enable failed\n"); in ahci_configure_dma_masks()
948 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_pci_print_info()
966 * hardwired to on-board SIMG 4726. The chipset is ICH8 and doesn't
981 * assumed without follow-up softreset.
996 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_p5wdh_workaround()
998 if (pdev->bus->number == 0 && pdev->devfn == PCI_DEVFN(0x1f, 2) && in ahci_p5wdh_workaround()
1000 struct ata_port *ap = host->ports[1]; in ahci_p5wdh_workaround()
1002 dev_info(&pdev->dev, in ahci_p5wdh_workaround()
1003 "enabling ASUS P5W DH Deluxe on-board SIMG4726 workaround\n"); in ahci_p5wdh_workaround()
1005 ap->ops = &ahci_p5wdh_ops; in ahci_p5wdh_workaround()
1006 ap->link.flags |= ATA_LFLAG_NO_SRST | ATA_LFLAG_ASSUME_ATA; in ahci_p5wdh_workaround()
1011 * Macbook7,1 firmware forcibly disables MCP89 AHCI and changes PCI ID when
1018 printk(KERN_INFO "ahci: enabling MCP89 AHCI mode\n"); in ahci_mcp89_apple_enable()
1046 return pdev->vendor == PCI_VENDOR_ID_NVIDIA && in is_mcp89_apple()
1047 pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA && in is_mcp89_apple()
1048 pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE && in is_mcp89_apple()
1049 pdev->subsystem_device == 0xcb89; in is_mcp89_apple()
1052 /* only some SB600 ahci controllers can do 64bit DMA */
1058 * working is 1501 which was released on 2007-10-26. in ahci_sb600_enable_64bit()
1064 .ident = "ASUS M2A-VM", in ahci_sb600_enable_64bit()
1068 DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"), in ahci_sb600_enable_64bit()
1073 * All BIOS versions for the MSI K9A2 Platinum (MS-7376) in ahci_sb600_enable_64bit()
1077 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". in ahci_sb600_enable_64bit()
1080 * "MICRO-STAR INTERNATIONAL CO.,LTD". in ahci_sb600_enable_64bit()
1081 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". in ahci_sb600_enable_64bit()
1084 * DMI field of "MS-7376". This was changed to be in ahci_sb600_enable_64bit()
1085 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still in ahci_sb600_enable_64bit()
1086 * match on DMI_BOARD_NAME of "MS-7376". in ahci_sb600_enable_64bit()
1092 "MICRO-STAR INTER"), in ahci_sb600_enable_64bit()
1093 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), in ahci_sb600_enable_64bit()
1097 * All BIOS versions for the MSI K9AGM2 (MS-7327) support in ahci_sb600_enable_64bit()
1102 * match on DMI_BOARD_VENDOR of "MICRO-STAR INTER" again. in ahci_sb600_enable_64bit()
1108 "MICRO-STAR INTER"), in ahci_sb600_enable_64bit()
1109 DMI_MATCH(DMI_BOARD_NAME, "MS-7327"), in ahci_sb600_enable_64bit()
1131 if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) || in ahci_sb600_enable_64bit()
1135 if (!match->driver_data) in ahci_sb600_enable_64bit()
1141 if (strcmp(buf, match->driver_data) >= 0) in ahci_sb600_enable_64bit()
1144 dev_warn(&pdev->dev, in ahci_sb600_enable_64bit()
1146 match->ident); in ahci_sb600_enable_64bit()
1151 dev_warn(&pdev->dev, "%s: enabling 64bit DMA\n", match->ident); in ahci_sb600_enable_64bit()
1161 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_system_poweroff()
1170 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_system_poweroff()
1182 unsigned long slot = (unsigned long)dmi->driver_data; in ahci_broken_system_poweroff()
1183 /* apply the quirk only to on-board controllers */ in ahci_broken_system_poweroff()
1184 return slot == PCI_SLOT(pdev->devfn); in ahci_broken_system_poweroff()
1194 * On HP dv[4-6] and HDX18 with earlier BIOSen, link in ahci_broken_suspend()
1209 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1218 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1227 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1236 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1265 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) in ahci_broken_suspend()
1271 return strcmp(buf, dmi->driver_data) < 0; in ahci_broken_suspend()
1324 return strcmp(buf, dmi->driver_data) < 0; in ahci_broken_lpm()
1346 .ident = "EP45-DQ6", in ahci_broken_online()
1350 DMI_MATCH(DMI_BOARD_NAME, "EP45-DQ6"), in ahci_broken_online()
1355 .ident = "EP45-DS5", in ahci_broken_online()
1359 DMI_MATCH(DMI_BOARD_NAME, "EP45-DS5"), in ahci_broken_online()
1372 val = (unsigned long)dmi->driver_data; in ahci_broken_online()
1374 return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff); in ahci_broken_online()
1396 * is FPDMA non-zero offset enable which when enabled in ahci_gtf_filter_workaround()
1417 filter = (unsigned long)dmi->driver_data; in ahci_gtf_filter_workaround()
1418 dev_info(host->dev, "applying extra ACPI _GTF filter 0x%x for %s\n", in ahci_gtf_filter_workaround()
1419 filter, dmi->ident); in ahci_gtf_filter_workaround()
1421 for (i = 0; i < host->n_ports; i++) { in ahci_gtf_filter_workaround()
1422 struct ata_port *ap = host->ports[i]; in ahci_gtf_filter_workaround()
1428 dev->gtf_filter |= filter; in ahci_gtf_filter_workaround()
1455 DMI_MATCH(DMI_PRODUCT_NAME, "Switch SA5-271") in acer_sa5_271_workaround()
1462 dev_info(&pdev->dev, "enabling Acer Switch Alpha 12 workaround\n"); in acer_sa5_271_workaround()
1463 if ((hpriv->saved_cap & 0xC734FF00) == 0xC734FF00) { in acer_sa5_271_workaround()
1464 hpriv->port_map = 0x7; in acer_sa5_271_workaround()
1465 hpriv->cap = 0xC734FF02; in acer_sa5_271_workaround()
1485 hpriv = host->private_data; in ahci_thunderx_irq_handler()
1486 mmio = hpriv->mmio; in ahci_thunderx_irq_handler()
1492 irq_masked = irq_stat & hpriv->port_map; in ahci_thunderx_irq_handler()
1493 spin_lock(&host->lock); in ahci_thunderx_irq_handler()
1499 spin_unlock(&host->lock); in ahci_thunderx_irq_handler()
1515 if (pdev->vendor != PCI_VENDOR_ID_INTEL || in ahci_remap_check()
1518 !(readl(hpriv->mmio + AHCI_VSCAP) & 1)) in ahci_remap_check()
1521 cap = readq(hpriv->mmio + AHCI_REMAP_CAP); in ahci_remap_check()
1525 if (readl(hpriv->mmio + ahci_remap_dcc(i)) in ahci_remap_check()
1530 hpriv->remapped_nvme++; in ahci_remap_check()
1533 if (!hpriv->remapped_nvme) in ahci_remap_check()
1536 dev_warn(&pdev->dev, "Found %u remapped NVMe devices.\n", in ahci_remap_check()
1537 hpriv->remapped_nvme); in ahci_remap_check()
1538 dev_warn(&pdev->dev, in ahci_remap_check()
1539 "Switch your BIOS from RAID to AHCI mode to use them.\n"); in ahci_remap_check()
1542 * Don't rely on the msi-x capability in the remap case, in ahci_remap_check()
1543 * share the legacy interrupt across ahci and remapped devices. in ahci_remap_check()
1545 hpriv->flags |= AHCI_HFLAG_NO_MSI; in ahci_remap_check()
1550 return pci_irq_vector(to_pci_dev(host->dev), port); in ahci_get_irq_vector()
1558 if (hpriv->flags & AHCI_HFLAG_NO_MSI) in ahci_init_msi()
1559 return -ENODEV; in ahci_init_msi()
1570 if (!(readl(hpriv->mmio + HOST_CTL) & HOST_MRSM)) { in ahci_init_msi()
1571 hpriv->get_irq_vector = ahci_get_irq_vector; in ahci_init_msi()
1572 hpriv->flags |= AHCI_HFLAG_MULTI_MSI; in ahci_init_msi()
1581 "ahci: MRSM is on, fallback to single MSI\n"); in ahci_init_msi()
1587 * If the host is not capable of supporting per-port vectors, fall in ahci_init_msi()
1588 * back to single MSI before finally attempting single MSI-X. in ahci_init_msi()
1603 if (!(hpriv->flags & AHCI_HFLAG_USE_LPM_POLICY)) in ahci_update_initial_lpm_policy()
1607 if (mobile_lpm_policy != -1) { in ahci_update_initial_lpm_policy()
1613 if (hpriv->cap & HOST_CAP_PART) in ahci_update_initial_lpm_policy()
1615 else if (hpriv->cap & HOST_CAP_SSC) in ahci_update_initial_lpm_policy()
1621 ap->target_lpm_policy = policy; in ahci_update_initial_lpm_policy()
1630 * Only apply the 6-port PCS quirk for known legacy platforms. in ahci_intel_pcs_quirk()
1632 if (!id || id->vendor != PCI_VENDOR_ID_INTEL) in ahci_intel_pcs_quirk()
1636 if (((enum board_ids) id->driver_data) >= board_ahci_pcs7) in ahci_intel_pcs_quirk()
1641 * implemented as write or write-once register. If the register in ahci_intel_pcs_quirk()
1642 * isn't programmed, ahci automatically generates it from number in ahci_intel_pcs_quirk()
1648 if ((tmp16 & hpriv->port_map) != hpriv->port_map) { in ahci_intel_pcs_quirk()
1649 tmp16 |= hpriv->port_map; in ahci_intel_pcs_quirk()
1659 struct ahci_host_priv *hpriv = host->private_data; in remapped_nvme_show()
1661 return sysfs_emit(buf, "%u\n", hpriv->remapped_nvme); in remapped_nvme_show()
1668 unsigned int board_id = ent->driver_data; in ahci_init_one()
1671 struct device *dev = &pdev->dev; in ahci_init_one()
1679 ata_print_version_once(&pdev->dev, DRV_VERSION); in ahci_init_one()
1681 /* The AHCI driver can only drive the SATA ports, the PATA driver in ahci_init_one()
1683 AHCI stays out of the way */ in ahci_init_one()
1684 if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) in ahci_init_one()
1685 return -ENODEV; in ahci_init_one()
1687 /* Apple BIOS on MCP89 prevents us using AHCI */ in ahci_init_one()
1691 /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. in ahci_init_one()
1692 * At the moment, we can only use the AHCI mode. Let the users know in ahci_init_one()
1695 if (pdev->vendor == PCI_VENDOR_ID_PROMISE) in ahci_init_one()
1696 dev_info(&pdev->dev, in ahci_init_one()
1699 /* Some devices use non-standard BARs */ in ahci_init_one()
1700 if (pdev->vendor == PCI_VENDOR_ID_STMICRO && pdev->device == 0xCC06) in ahci_init_one()
1702 else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) in ahci_init_one()
1704 else if (pdev->vendor == PCI_VENDOR_ID_CAVIUM) { in ahci_init_one()
1705 if (pdev->device == 0xa01c) in ahci_init_one()
1707 if (pdev->device == 0xa084) in ahci_init_one()
1709 } else if (pdev->vendor == PCI_VENDOR_ID_LOONGSON) { in ahci_init_one()
1710 if (pdev->device == 0x7a08) in ahci_init_one()
1719 if (pdev->vendor == PCI_VENDOR_ID_INTEL && in ahci_init_one()
1720 (pdev->device == 0x2652 || pdev->device == 0x2653)) { in ahci_init_one()
1723 /* ICH6s share the same PCI ID for both piix and ahci in ahci_init_one()
1724 * modes. Enabling ahci mode while MAP indicates in ahci_init_one()
1729 dev_info(&pdev->dev, in ahci_init_one()
1730 "controller is in combined mode, can't enable AHCI mode\n"); in ahci_init_one()
1731 return -ENODEV; in ahci_init_one()
1735 /* AHCI controllers often implement SFF compatible interface. in ahci_init_one()
1739 if (rc == -EBUSY) in ahci_init_one()
1746 return -ENOMEM; in ahci_init_one()
1747 hpriv->flags |= (unsigned long)pi.private_data; in ahci_init_one()
1751 (pdev->revision == 0xa1 || pdev->revision == 0xa2)) in ahci_init_one()
1752 hpriv->flags |= AHCI_HFLAG_NO_MSI; in ahci_init_one()
1755 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) in ahci_init_one()
1756 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; in ahci_init_one()
1760 hpriv->flags &= ~AHCI_HFLAG_32BIT_ONLY; in ahci_init_one()
1762 hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar]; in ahci_init_one()
1767 sysfs_add_file_to_group(&pdev->dev.kobj, in ahci_init_one()
1773 hpriv->flags |= AHCI_HFLAG_NO_DEVSLP; in ahci_init_one()
1776 if (pdev->vendor == PCI_VENDOR_ID_HUAWEI && in ahci_init_one()
1777 pdev->device == 0xa235 && in ahci_init_one()
1778 pdev->revision < 0x30) in ahci_init_one()
1779 hpriv->flags |= AHCI_HFLAG_NO_SXS; in ahci_init_one()
1781 if (pdev->vendor == 0x177d && pdev->device == 0xa01c) in ahci_init_one()
1782 hpriv->irq_handler = ahci_thunderx_irq_handler; in ahci_init_one()
1795 if (hpriv->cap & HOST_CAP_NCQ) { in ahci_init_one()
1798 * Auto-activate optimization is supposed to be in ahci_init_one()
1799 * supported on all AHCI controllers indicating NCQ in ahci_init_one()
1803 if (!(hpriv->flags & AHCI_HFLAG_NO_FPDMA_AA)) in ahci_init_one()
1807 * All AHCI controllers should be forward-compatible in ahci_init_one()
1809 * conditionalized if any buggy AHCI controllers are in ahci_init_one()
1815 if (hpriv->cap & HOST_CAP_PMP) in ahci_init_one()
1822 dev_info(&pdev->dev, in ahci_init_one()
1828 dev_warn(&pdev->dev, in ahci_init_one()
1833 hpriv->flags |= AHCI_HFLAG_NO_SUSPEND; in ahci_init_one()
1834 dev_warn(&pdev->dev, in ahci_init_one()
1839 hpriv->flags |= AHCI_HFLAG_SRST_TOUT_IS_OFFLINE; in ahci_init_one()
1840 dev_info(&pdev->dev, in ahci_init_one()
1845 /* Acer SA5-271 workaround modifies private_data */ in ahci_init_one()
1853 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); in ahci_init_one()
1855 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); in ahci_init_one()
1857 return -ENOMEM; in ahci_init_one()
1858 host->private_data = hpriv; in ahci_init_one()
1864 hpriv->irq = pci_irq_vector(pdev, 0); in ahci_init_one()
1866 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) in ahci_init_one()
1867 host->flags |= ATA_HOST_PARALLEL_SCAN; in ahci_init_one()
1869 dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n"); in ahci_init_one()
1874 for (i = 0; i < host->n_ports; i++) { in ahci_init_one()
1875 struct ata_port *ap = host->ports[i]; in ahci_init_one()
1877 ata_port_pbar_desc(ap, ahci_pci_bar, -1, "abar"); in ahci_init_one()
1879 0x100 + ap->port_no * 0x80, "port"); in ahci_init_one()
1882 if (ap->flags & ATA_FLAG_EM) in ahci_init_one()
1883 ap->em_message_type = hpriv->em_msg_type; in ahci_init_one()
1887 /* disabled/not-implemented port */ in ahci_init_one()
1888 if (!(hpriv->port_map & (1 << i))) in ahci_init_one()
1889 ap->ops = &ata_dummy_port_ops; in ahci_init_one()
1899 rc = ahci_configure_dma_masks(pdev, hpriv->cap & HOST_CAP_64); in ahci_init_one()
1916 pm_runtime_put_noidle(&pdev->dev); in ahci_init_one()
1927 sysfs_remove_file_from_group(&pdev->dev.kobj, in ahci_remove_one()
1930 pm_runtime_get_noresume(&pdev->dev); in ahci_remove_one()
1937 MODULE_DESCRIPTION("AHCI SATA low-level driver");