Lines Matching +full:non +full:- +full:empty
2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
63 /* Save area for non-coprocessor optional and custom (TIE) state: */
68 #define XCHAL_TOTAL_SA_SIZE 48 /* with 16-byte align padding */
81 * abikind = 0 (caller-saved), 1 (callee-saved), or 2 (thread-global)
89 * dbnum = unique target number f/debug (see <xtensa-libdb-macros.h>)
91 * regnum = reg index in regfile, or special/TIE-user reg number
98 * To filter out certain registers, e.g. to expand only the non-global
124 #define XCHAL_CP0_SA_LIST(s) /* empty */
127 #define XCHAL_CP1_SA_LIST(s) /* empty */
130 #define XCHAL_CP2_SA_LIST(s) /* empty */
133 #define XCHAL_CP3_SA_LIST(s) /* empty */
136 #define XCHAL_CP4_SA_LIST(s) /* empty */
139 #define XCHAL_CP5_SA_LIST(s) /* empty */
142 #define XCHAL_CP6_SA_LIST(s) /* empty */
145 #define XCHAL_CP7_SA_LIST(s) /* empty */