Lines Matching +full:0 +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
26 soc@0 {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "intel,ce4100-cp";
32 ioapic1: interrupt-controller@fec00000 {
33 #interrupt-cells = <2>;
34 compatible = "intel,ce4100-ioapic";
35 interrupt-controller;
36 reg = <0xfec00000 0x1000>;
40 compatible = "intel,ce4100-hpet";
41 reg = <0xfed00000 0x200>;
44 lapic0: interrupt-controller@fee00000 {
45 compatible = "intel,ce4100-lapic";
46 reg = <0xfee00000 0x1000>;
50 #address-cells = <3>;
51 #size-cells = <2>;
52 compatible = "intel,ce4100-pci", "pci";
54 bus-range = <0 0>;
55 ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
56 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
57 0x0000000 0 0x0 0x0 0 0x100>;
59 /* Secondary IO-APIC */
60 ioapic2: interrupt-controller@0,1 {
61 #interrupt-cells = <2>;
62 compatible = "intel,ce4100-ioapic";
63 interrupt-controller;
64 reg = <0x100 0x0 0x0 0x0 0x0>;
65 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
68 pci@1,0 {
69 #address-cells = <3>;
70 #size-cells = <2>;
71 compatible = "intel,ce4100-pci", "pci";
73 bus-range = <1 1>;
74 reg = <0x0800 0x0 0x0 0x0 0x0>;
75 ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
77 interrupt-parent = <&ioapic2>;
79 display@2,0 {
80 compatible = "pci8086,2e5b.2",
81 "pci8086,2e5b",
85 reg = <0x11000 0x0 0x0 0x0 0x0>;
86 interrupts = <0 1>;
89 multimedia@3,0 {
90 compatible = "pci8086,2e5c.2",
91 "pci8086,2e5c",
95 reg = <0x11800 0x0 0x0 0x0 0x0>;
96 interrupts = <2 1>;
99 multimedia@4,0 {
100 compatible = "pci8086,2e5d.2",
101 "pci8086,2e5d",
105 reg = <0x12000 0x0 0x0 0x0 0x0>;
110 compatible = "pci8086,2e5e.2",
111 "pci8086,2e5e",
115 reg = <0x12100 0x0 0x0 0x0 0x0>;
119 sound@6,0 {
120 compatible = "pci8086,2e5f.2",
121 "pci8086,2e5f",
125 reg = <0x13000 0x0 0x0 0x0 0x0>;
130 compatible = "pci8086,2e5f.2",
131 "pci8086,2e5f",
135 reg = <0x13100 0x0 0x0 0x0 0x0>;
139 sound@6,2 {
140 compatible = "pci8086,2e60.2",
141 "pci8086,2e60",
145 reg = <0x13200 0x0 0x0 0x0 0x0>;
149 display@8,0 {
150 compatible = "pci8086,2e61.2",
151 "pci8086,2e61",
155 reg = <0x14000 0x0 0x0 0x0 0x0>;
160 compatible = "pci8086,2e62.2",
161 "pci8086,2e62",
165 reg = <0x14100 0x0 0x0 0x0 0x0>;
169 multimedia@8,2 {
170 compatible = "pci8086,2e63.2",
171 "pci8086,2e63",
175 reg = <0x14200 0x0 0x0 0x0 0x0>;
179 entertainment-encryption@9,0 {
180 compatible = "pci8086,2e64.2",
181 "pci8086,2e64",
185 reg = <0x14800 0x0 0x0 0x0 0x0>;
189 localbus@a,0 {
190 compatible = "pci8086,2e65.2",
191 "pci8086,2e65",
195 reg = <0x15000 0x0 0x0 0x0 0x0>;
198 serial@b,0 {
199 compatible = "pci8086,2e66.2",
200 "pci8086,2e66",
204 reg = <0x15800 0x0 0x0 0x0 0x0>;
209 #gpio-cells = <2>;
210 #interrupt-cells = <2>;
211 compatible = "pci8086,2e67.2",
212 "pci8086,2e67",
216 reg = <0x15900 0x0 0x0 0x0 0x0>;
218 interrupt-controller;
219 gpio-controller;
220 intel,muxctl = <0>;
223 i2c-controller@b,2 {
224 #address-cells = <2>;
225 #size-cells = <1>;
226 compatible = "pci8086,2e68.2",
227 "pci8086,2e68",
231 reg = <0x15a00 0x0 0x0 0x0 0x0>;
233 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
234 1 0 0x02000000 0 0xdffe0600 0x100
235 2 0 0x02000000 0 0xdffe0700 0x100>;
237 i2c@0 {
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "intel,ce4100-i2c-controller";
241 reg = <0 0 0x100>;
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "intel,ce4100-i2c-controller";
248 reg = <1 0 0x100>;
251 #gpio-cells = <2>;
253 reg = <0x26>;
254 gpio-controller;
258 i2c@2 {
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "intel,ce4100-i2c-controller";
262 reg = <2 0 0x100>;
265 #gpio-cells = <2>;
267 reg = <0x26>;
268 gpio-controller;
273 smard-card@b,3 {
274 compatible = "pci8086,2e69.2",
275 "pci8086,2e69",
279 reg = <0x15b00 0x0 0x0 0x0 0x0>;
283 spi-controller@b,4 {
284 #address-cells = <1>;
285 #size-cells = <0>;
287 "pci8086,2e6a.2",
288 "pci8086,2e6a",
292 reg = <0x15c00 0x0 0x0 0x0 0x0>;
295 dac@0 {
297 reg = <0>;
298 spi-max-frequency = <115200>;
304 spi-max-frequency = <115200>;
307 eeprom@2 {
309 reg = <2>;
310 spi-max-frequency = <115200>;
315 compatible = "pci8086,2e6d.2",
316 "pci8086,2e6d",
320 reg = <0x15f00 0x0 0x0 0x0 0x0>;
323 ethernet@c,0 {
324 compatible = "pci8086,2e6e.2",
325 "pci8086,2e6e",
329 reg = <0x16000 0x0 0x0 0x0 0x0>;
334 compatible = "pci8086,2e6f.2",
335 "pci8086,2e6f",
339 reg = <0x16100 0x0 0x0 0x0 0x0>;
343 usb@d,0 {
344 compatible = "pci8086,2e70.2",
345 "pci8086,2e70",
349 reg = <0x16800 0x0 0x0 0x0 0x0>;
354 compatible = "pci8086,2e70.2",
355 "pci8086,2e70",
359 reg = <0x16900 0x0 0x0 0x0 0x0>;
363 sata@e,0 {
364 compatible = "pci8086,2e71.0",
365 "pci8086,2e71",
369 reg = <0x17000 0x0 0x0 0x0 0x0>;
373 flash@f,0 {
379 reg = <0x17800 0x0 0x0 0x0 0x0>;
383 entertainment-encryption@10,0 {
389 reg = <0x18000 0x0 0x0 0x0 0x0>;
392 co-processor@11,0 {
398 reg = <0x18800 0x0 0x0 0x0 0x0>;
402 multimedia@12,0 {
408 reg = <0x19000 0x0 0x0 0x0 0x0>;
412 isa@1f,0 {
413 #address-cells = <2>;
414 #size-cells = <1>;
416 reg = <0xf800 0x0 0x0 0x0 0x0>;
417 ranges = <1 0 0 0 0 0x100>;
420 compatible = "intel,ce4100-rtc", "motorola,mc146818";
422 interrupt-parent = <&ioapic1>;
423 ctrl-reg = <2>;
424 freq-reg = <0x26>;
425 reg = <1 0x70 2>;