68 #define EMIT2(b1, b2)		EMIT((b1) + ((b2) << 8), 2)  macro
76 	do { EMIT2(b1, b2); EMIT(off, 4); } while (0)
215 			EMIT2(0x33, add_2reg(0xC0, IA32_EAX, IA32_EAX));  in emit_ia32_mov_i()
225 			EMIT2(0x33, add_2reg(0xC0, dst, dst));  in emit_ia32_mov_i()
249 		EMIT2(0x89, add_2reg(0xC0, dst, sreg));  in emit_ia32_mov_r()
301 		EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_mul_r()
304 	EMIT2(0xF7, add_1reg(0xE0, sreg));  in emit_ia32_mul_r()
312 		EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_mul_r()
338 		EMIT2(0x0F, 0xB7);  in emit_ia32_to_le_r64()
342 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_le_r64()
347 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_le_r64()
386 		EMIT2(0x0F, 0xB7);  in emit_ia32_to_be_r64()
391 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_be_r64()
400 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_be_r64()
412 		EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi));  in emit_ia32_to_be_r64()
414 		EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_to_be_r64()
416 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));  in emit_ia32_to_be_r64()
447 		EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));  in emit_ia32_div_mod_r()
455 		EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_div_mod_r()
458 	EMIT2(0x31, add_2reg(0xC0, IA32_EDX, IA32_EDX));  in emit_ia32_div_mod_r()
460 	EMIT2(0xF7, add_1reg(0xF0, IA32_ECX));  in emit_ia32_div_mod_r()
467 			EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX));  in emit_ia32_div_mod_r()
473 			EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_div_mod_r()
499 		EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));  in emit_ia32_shift_r()
511 	EMIT2(0xD3, add_1reg(b2, dreg));  in emit_ia32_shift_r()
544 			EMIT2(0x11, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
546 			EMIT2(0x01, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
551 			EMIT2(0x19, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
553 			EMIT2(0x29, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
557 		EMIT2(0x09, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
561 		EMIT2(0x21, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
565 		EMIT2(0x31, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
621 				EMIT2(0x11, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
626 				EMIT2(0x01, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
635 				EMIT2(0x19, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
640 				EMIT2(0x29, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
648 			EMIT2(0x09, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
655 			EMIT2(0x21, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
662 			EMIT2(0x31, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
665 		EMIT2(0xF7, add_1reg(0xD8, dreg));  in emit_ia32_alu_i()
713 	EMIT2(0xF7, add_1reg(0xD8, dreg_lo));  in emit_ia32_neg64()
717 	EMIT2(0xF7, add_1reg(0xD8, dreg_hi));  in emit_ia32_neg64()
752 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_lsh_r64()
757 	EMIT2(0xD3, add_1reg(0xE0, dreg_lo));  in emit_ia32_lsh_r64()
764 	EMIT2(IA32_JB, 4);  in emit_ia32_lsh_r64()
767 	EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_lsh_r64()
769 	EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_r64()
805 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_arsh_r64()
810 	EMIT2(0xD3, add_1reg(0xF8, dreg_hi));  in emit_ia32_arsh_r64()
817 	EMIT2(IA32_JB, 5);  in emit_ia32_arsh_r64()
820 	EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_r64()
858 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_rsh_r64()
863 	EMIT2(0xD3, add_1reg(0xE8, dreg_hi));  in emit_ia32_rsh_r64()
870 	EMIT2(IA32_JB, 4);  in emit_ia32_rsh_r64()
873 	EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_rsh_r64()
875 	EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_r64()
916 		EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_lsh_i64()
918 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_i64()
921 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_i64()
923 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_lsh_i64()
965 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_rsh_i64()
967 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_i64()
970 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_rsh_i64()
972 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_i64()
1013 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_i64()
1021 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_i64()
1047 		EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX));  in emit_ia32_mul_r64()
1054 		EMIT2(0xF7, add_1reg(0xE0, src_lo));  in emit_ia32_mul_r64()
1057 	EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_r64()
1065 		EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1072 		EMIT2(0xF7, add_1reg(0xE0, src_hi));  in emit_ia32_mul_r64()
1075 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_r64()
1083 		EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1090 		EMIT2(0xF7, add_1reg(0xE0, src_lo));  in emit_ia32_mul_r64()
1093 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));  in emit_ia32_mul_r64()
1104 		EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1106 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_r64()
1127 		EMIT2(0xF7, add_1reg(0xE0, dst_hi));  in emit_ia32_mul_i64()
1130 	EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_i64()
1139 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));  in emit_ia32_mul_i64()
1141 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_i64()
1150 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));  in emit_ia32_mul_i64()
1153 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));  in emit_ia32_mul_i64()
1164 		EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_i64()
1166 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_i64()
1212 	EMIT2(0x89, 0xE5);  in emit_prologue()
1225 	EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));  in emit_prologue()
1279 	EMIT2(0xFF, 0xE2);  in emit_jmp_edx()
1323 	EMIT2(IA32_JBE, jmp_label(jmp_label1, 2));  in emit_bpf_tail_call()
1336 	EMIT2(IA32_JNE, 3);  in emit_bpf_tail_call()
1341 	EMIT2(IA32_JAE, jmp_label(jmp_label1, 2));  in emit_bpf_tail_call()
1362 	EMIT2(0x85, add_2reg(0xC0, IA32_EDX, IA32_EDX));  in emit_bpf_tail_call()
1364 	EMIT2(IA32_JE, jmp_label(jmp_label1, 2));  in emit_bpf_tail_call()
1922 				EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in do_jit()
1928 				EMIT2(0x66, 0xC7); break;  in do_jit()
1935 				EMIT2(add_1reg(0x40, IA32_EAX), insn->off);  in do_jit()
1962 				EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in do_jit()
1970 				EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EDX));  in do_jit()
1976 				EMIT2(0x66, 0x89); break;  in do_jit()
1983 				EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),  in do_jit()
1997 					EMIT2(0x8B, add_2reg(0xC0, src_hi,  in do_jit()
2001 					EMIT2(add_2reg(0x40, IA32_EAX,  in do_jit()
2023 				EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX));  in do_jit()
2027 				EMIT2(0x0F, 0xB6); break;  in do_jit()
2029 				EMIT2(0x0F, 0xB7); break;  in do_jit()
2036 				EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),  in do_jit()
2048 				EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX));  in do_jit()
2061 					EMIT2(0x33,  in do_jit()
2075 					EMIT2(0x89,  in do_jit()
2189 				EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2190 				EMIT2(IA32_JNE, 2);  in do_jit()
2193 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2224 			EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2225 			EMIT2(IA32_JNE, 10);  in do_jit()
2227 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2248 				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));  in do_jit()
2251 					EMIT2(0x89,  in do_jit()
2265 			EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));  in do_jit()
2268 				EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));  in do_jit()
2270 				EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));  in do_jit()
2293 				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));  in do_jit()
2296 					EMIT2(0x89,  in do_jit()
2304 			EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));  in do_jit()
2310 				EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));  in do_jit()
2312 				EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));  in do_jit()
2356 				EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2357 				EMIT2(IA32_JNE, 2);  in do_jit()
2360 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2367 				EMIT2(jmp_cond, jmp_offset);  in do_jit()
2401 			EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2402 			EMIT2(IA32_JNE, 10);  in do_jit()
2404 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2421 			EMIT2(0xEB, 6);  in do_jit()
2453 				EMIT2(0xEB, jmp_offset);  in do_jit()