Lines Matching +full:ecx +full:- +full:1000
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
30 #include <linux/entry-kvm.h>
48 #include <asm/spec-ctrl.h>
133 /* Guest_tsc -> host_tsc conversion requires 64-bit division. */
184 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
200 /* Default doubles per-vcpu window every exit. */
204 /* Default resets per-vcpu window every exit to ple_window. */
212 /* Default is SYSTEM mode, 1 for host-guest mode */
294 return -ENOMEM; in vmx_setup_l1d_flush()
333 return -EINVAL; in vmentry_l1d_flush_parse()
389 if (!vmx->disable_fb_clear) in vmx_disable_fb_clear()
396 vmx->msr_ia32_mcu_opt_ctrl = msr; in vmx_disable_fb_clear()
401 if (!vmx->disable_fb_clear) in vmx_enable_fb_clear()
404 vmx->msr_ia32_mcu_opt_ctrl &= ~FB_CLEAR_DIS; in vmx_enable_fb_clear()
405 native_wrmsrl(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl); in vmx_enable_fb_clear()
410 vmx->disable_fb_clear = vmx_fb_clear_ctrl_available; in vmx_update_fb_clear_dis()
417 if ((vcpu->arch.arch_capabilities & ARCH_CAP_FB_CLEAR) || in vmx_update_fb_clear_dis()
418 ((vcpu->arch.arch_capabilities & ARCH_CAP_MDS_NO) && in vmx_update_fb_clear_dis()
419 (vcpu->arch.arch_capabilities & ARCH_CAP_TAA_NO) && in vmx_update_fb_clear_dis()
420 (vcpu->arch.arch_capabilities & ARCH_CAP_PSDP_NO) && in vmx_update_fb_clear_dis()
421 (vcpu->arch.arch_capabilities & ARCH_CAP_FBSDP_NO) && in vmx_update_fb_clear_dis()
422 (vcpu->arch.arch_capabilities & ARCH_CAP_SBDR_SSDP_NO))) in vmx_update_fb_clear_dis()
423 vmx->disable_fb_clear = false; in vmx_update_fb_clear_dis()
483 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
520 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_clear()
533 &to_kvm_hv(vcpu->kvm)->hv_pa_pg; in hv_enable_direct_tlbflush()
535 * Synthetic VM-Exit is not enabled in current code and so All in hv_enable_direct_tlbflush()
542 return -ENOMEM; in hv_enable_direct_tlbflush()
544 evmcs = (struct hv_enlightened_vmcs *)to_vmx(vcpu)->loaded_vmcs->vmcs; in hv_enable_direct_tlbflush()
546 evmcs->partition_assist_page = in hv_enable_direct_tlbflush()
548 evmcs->hv_vm_id = (unsigned long)vcpu->kvm; in hv_enable_direct_tlbflush()
549 evmcs->hv_enlightenments_control.nested_flush_hypercall = 1; in hv_enable_direct_tlbflush()
557 * Comment's format: document - errata name - stepping - processor name.
562 /* 323344.pdf - BA86 - D0 - Xeon 7500 Series */
564 /* 323056.pdf - AAX65 - C2 - Xeon L3406 */
565 /* 322814.pdf - AAT59 - C2 - i7-600, i5-500, i5-400 and i3-300 Mobile */
566 /* 322911.pdf - AAU65 - C2 - i5-600, i3-500 Desktop and Pentium G6950 */
568 /* 322911.pdf - AAU65 - K0 - i5-600, i3-500 Desktop and Pentium G6950 */
570 /* 322373.pdf - AAO95 - B1 - Xeon 3400 Series */
571 /* 322166.pdf - AAN92 - B1 - i7-800 and i5-700 Desktop */
573 * 320767.pdf - AAP86 - B1 -
574 * i7-900 Mobile Extreme, i7-800 and i7-700 Mobile
577 /* 321333.pdf - AAM126 - C0 - Xeon 3500 */
579 /* 321333.pdf - AAM126 - C1 - Xeon 3500 */
581 /* 320836.pdf - AAJ124 - C0 - i7-900 Desktop Extreme and i7-900 Desktop */
583 /* 321333.pdf - AAM126 - D0 - Xeon 3500 */
584 /* 321324.pdf - AAK139 - D0 - Xeon 5500 */
585 /* 320836.pdf - AAJ124 - D0 - i7-900 Extreme and i7-900 Desktop */
587 /* Xeon E3-1220 V2 */
617 return -ENOENT; in possible_passthrough_msr_slot()
645 r = possible_passthrough_msr_slot(msr) != -ENOENT; in is_valid_passthrough_msr()
658 return &vmx->guest_uret_msrs[i]; in vmx_find_uret_msr()
665 unsigned int slot = msr - vmx->guest_uret_msrs; in vmx_set_guest_uret_msr()
668 if (msr->load_into_hardware) { in vmx_set_guest_uret_msr()
670 ret = kvm_set_user_return_msr(slot, data, msr->mask); in vmx_set_guest_uret_msr()
674 msr->data = data; in vmx_set_guest_uret_msr()
686 vmcs_clear(v->vmcs); in crash_vmclear_local_loaded_vmcss()
695 if (loaded_vmcs->cpu != cpu) in __loaded_vmcs_clear()
697 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs) in __loaded_vmcs_clear()
700 vmcs_clear(loaded_vmcs->vmcs); in __loaded_vmcs_clear()
701 if (loaded_vmcs->shadow_vmcs && loaded_vmcs->launched) in __loaded_vmcs_clear()
702 vmcs_clear(loaded_vmcs->shadow_vmcs); in __loaded_vmcs_clear()
704 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link); in __loaded_vmcs_clear()
708 * current percpu list, complete before setting loaded_vmcs->cpu to in __loaded_vmcs_clear()
709 * -1, otherwise a different cpu can see loaded_vmcs->cpu == -1 first in __loaded_vmcs_clear()
715 loaded_vmcs->cpu = -1; in __loaded_vmcs_clear()
716 loaded_vmcs->launched = 0; in __loaded_vmcs_clear()
721 int cpu = loaded_vmcs->cpu; in loaded_vmcs_clear()
723 if (cpu != -1) in loaded_vmcs_clear()
734 if (!kvm_register_is_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS)) { in vmx_segment_cache_test_set()
735 kvm_register_mark_available(&vmx->vcpu, VCPU_EXREG_SEGMENTS); in vmx_segment_cache_test_set()
736 vmx->segment_cache.bitmask = 0; in vmx_segment_cache_test_set()
738 ret = vmx->segment_cache.bitmask & mask; in vmx_segment_cache_test_set()
739 vmx->segment_cache.bitmask |= mask; in vmx_segment_cache_test_set()
745 u16 *p = &vmx->segment_cache.seg[seg].selector; in vmx_read_guest_seg_selector()
754 ulong *p = &vmx->segment_cache.seg[seg].base; in vmx_read_guest_seg_base()
763 u32 *p = &vmx->segment_cache.seg[seg].limit; in vmx_read_guest_seg_limit()
772 u32 *p = &vmx->segment_cache.seg[seg].ar; in vmx_read_guest_seg_ar()
793 if ((vcpu->guest_debug & in vmx_update_exception_bitmap()
797 if (to_vmx(vcpu)->rmode.vm86_active) in vmx_update_exception_bitmap()
808 eb |= get_vmcs12(vcpu)->exception_bitmap; in vmx_update_exception_bitmap()
817 * non-reserved faults. For vmcs02, however, PFEC_MASK in vmx_update_exception_bitmap()
832 if (vcpu->arch.xfd_no_write_intercept) in vmx_update_exception_bitmap()
846 return vmx_test_msr_bitmap_write(vmx->loaded_vmcs->msr_bitmap, msr); in msr_write_intercepted()
853 if (vmx->loaded_vmcs->launched) in __vmx_vcpu_run_flags()
859 * it after vmexit and store it in vmx->spec_ctrl. in __vmx_vcpu_run_flags()
878 for (i = 0; i < m->nr; ++i) { in vmx_find_loadstore_msr_slot()
879 if (m->val[i].index == msr) in vmx_find_loadstore_msr_slot()
882 return -ENOENT; in vmx_find_loadstore_msr_slot()
888 struct msr_autoload *m = &vmx->msr_autoload; in clear_atomic_switch_msr()
908 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in clear_atomic_switch_msr()
911 --m->guest.nr; in clear_atomic_switch_msr()
912 m->guest.val[i] = m->guest.val[m->guest.nr]; in clear_atomic_switch_msr()
913 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in clear_atomic_switch_msr()
916 i = vmx_find_loadstore_msr_slot(&m->host, msr); in clear_atomic_switch_msr()
920 --m->host.nr; in clear_atomic_switch_msr()
921 m->host.val[i] = m->host.val[m->host.nr]; in clear_atomic_switch_msr()
922 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in clear_atomic_switch_msr()
941 struct msr_autoload *m = &vmx->msr_autoload; in add_atomic_switch_msr()
975 i = vmx_find_loadstore_msr_slot(&m->guest, msr); in add_atomic_switch_msr()
977 j = vmx_find_loadstore_msr_slot(&m->host, msr); in add_atomic_switch_msr()
979 if ((i < 0 && m->guest.nr == MAX_NR_LOADSTORE_MSRS) || in add_atomic_switch_msr()
980 (j < 0 && m->host.nr == MAX_NR_LOADSTORE_MSRS)) { in add_atomic_switch_msr()
986 i = m->guest.nr++; in add_atomic_switch_msr()
987 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->guest.nr); in add_atomic_switch_msr()
989 m->guest.val[i].index = msr; in add_atomic_switch_msr()
990 m->guest.val[i].value = guest_val; in add_atomic_switch_msr()
996 j = m->host.nr++; in add_atomic_switch_msr()
997 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->host.nr); in add_atomic_switch_msr()
999 m->host.val[j].index = msr; in add_atomic_switch_msr()
1000 m->host.val[j].value = host_val; in add_atomic_switch_msr()
1005 u64 guest_efer = vmx->vcpu.arch.efer; in update_transition_efer()
1030 (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX))) { in update_transition_efer()
1050 vmx->guest_uret_msrs[i].data = guest_efer; in update_transition_efer()
1051 vmx->guest_uret_msrs[i].mask = ~ignore_bits; in update_transition_efer()
1058 * On 32-bit kernels, VM exits still load the FS and GS bases from the
1088 !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_can_write_msr()
1093 /* The base must be 128-byte aligned and a legal physical address. */ in pt_output_base_valid()
1101 wrmsrl(MSR_IA32_RTIT_STATUS, ctx->status); in pt_load_msr()
1102 wrmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_load_msr()
1103 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1104 wrmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_load_msr()
1106 wrmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_load_msr()
1107 wrmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_load_msr()
1115 rdmsrl(MSR_IA32_RTIT_STATUS, ctx->status); in pt_save_msr()
1116 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, ctx->output_base); in pt_save_msr()
1117 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1118 rdmsrl(MSR_IA32_RTIT_CR3_MATCH, ctx->cr3_match); in pt_save_msr()
1120 rdmsrl(MSR_IA32_RTIT_ADDR0_A + i * 2, ctx->addr_a[i]); in pt_save_msr()
1121 rdmsrl(MSR_IA32_RTIT_ADDR0_B + i * 2, ctx->addr_b[i]); in pt_save_msr()
1134 rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_enter()
1135 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_enter()
1137 pt_save_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1138 pt_load_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_enter()
1147 if (vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) { in pt_guest_exit()
1148 pt_save_msr(&vmx->pt_desc.guest, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1149 pt_load_msr(&vmx->pt_desc.host, vmx->pt_desc.num_address_ranges); in pt_guest_exit()
1154 * i.e. RTIT_CTL is always cleared on VM-Exit. Restore it if necessary. in pt_guest_exit()
1156 if (vmx->pt_desc.host.ctl) in pt_guest_exit()
1157 wrmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl); in pt_guest_exit()
1163 if (unlikely(fs_sel != host->fs_sel)) { in vmx_set_host_fs_gs()
1168 host->fs_sel = fs_sel; in vmx_set_host_fs_gs()
1170 if (unlikely(gs_sel != host->gs_sel)) { in vmx_set_host_fs_gs()
1175 host->gs_sel = gs_sel; in vmx_set_host_fs_gs()
1177 if (unlikely(fs_base != host->fs_base)) { in vmx_set_host_fs_gs()
1179 host->fs_base = fs_base; in vmx_set_host_fs_gs()
1181 if (unlikely(gs_base != host->gs_base)) { in vmx_set_host_fs_gs()
1183 host->gs_base = gs_base; in vmx_set_host_fs_gs()
1198 vmx->req_immediate_exit = false; in vmx_prepare_switch_to_guest()
1203 * to/from long-mode by setting MSR_EFER.LMA. in vmx_prepare_switch_to_guest()
1205 if (!vmx->guest_uret_msrs_loaded) { in vmx_prepare_switch_to_guest()
1206 vmx->guest_uret_msrs_loaded = true; in vmx_prepare_switch_to_guest()
1208 if (!vmx->guest_uret_msrs[i].load_into_hardware) in vmx_prepare_switch_to_guest()
1212 vmx->guest_uret_msrs[i].data, in vmx_prepare_switch_to_guest()
1213 vmx->guest_uret_msrs[i].mask); in vmx_prepare_switch_to_guest()
1217 if (vmx->nested.need_vmcs12_to_shadow_sync) in vmx_prepare_switch_to_guest()
1220 if (vmx->guest_state_loaded) in vmx_prepare_switch_to_guest()
1223 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_guest()
1229 host_state->ldt_sel = kvm_read_ldt(); in vmx_prepare_switch_to_guest()
1232 savesegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_guest()
1233 savesegment(es, host_state->es_sel); in vmx_prepare_switch_to_guest()
1236 if (likely(is_64bit_mm(current->mm))) { in vmx_prepare_switch_to_guest()
1238 fs_sel = current->thread.fsindex; in vmx_prepare_switch_to_guest()
1239 gs_sel = current->thread.gsindex; in vmx_prepare_switch_to_guest()
1240 fs_base = current->thread.fsbase; in vmx_prepare_switch_to_guest()
1241 vmx->msr_host_kernel_gs_base = current->thread.gsbase; in vmx_prepare_switch_to_guest()
1246 vmx->msr_host_kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE); in vmx_prepare_switch_to_guest()
1249 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_guest()
1258 vmx->guest_state_loaded = true; in vmx_prepare_switch_to_guest()
1265 if (!vmx->guest_state_loaded) in vmx_prepare_switch_to_host()
1268 host_state = &vmx->loaded_vmcs->host_state; in vmx_prepare_switch_to_host()
1270 ++vmx->vcpu.stat.host_state_reload; in vmx_prepare_switch_to_host()
1273 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_prepare_switch_to_host()
1275 if (host_state->ldt_sel || (host_state->gs_sel & 7)) { in vmx_prepare_switch_to_host()
1276 kvm_load_ldt(host_state->ldt_sel); in vmx_prepare_switch_to_host()
1278 load_gs_index(host_state->gs_sel); in vmx_prepare_switch_to_host()
1280 loadsegment(gs, host_state->gs_sel); in vmx_prepare_switch_to_host()
1283 if (host_state->fs_sel & 7) in vmx_prepare_switch_to_host()
1284 loadsegment(fs, host_state->fs_sel); in vmx_prepare_switch_to_host()
1286 if (unlikely(host_state->ds_sel | host_state->es_sel)) { in vmx_prepare_switch_to_host()
1287 loadsegment(ds, host_state->ds_sel); in vmx_prepare_switch_to_host()
1288 loadsegment(es, host_state->es_sel); in vmx_prepare_switch_to_host()
1293 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base); in vmx_prepare_switch_to_host()
1296 vmx->guest_state_loaded = false; in vmx_prepare_switch_to_host()
1297 vmx->guest_uret_msrs_loaded = false; in vmx_prepare_switch_to_host()
1304 if (vmx->guest_state_loaded) in vmx_read_guest_kernel_gs_base()
1305 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in vmx_read_guest_kernel_gs_base()
1307 return vmx->msr_guest_kernel_gs_base; in vmx_read_guest_kernel_gs_base()
1313 if (vmx->guest_state_loaded) in vmx_write_guest_kernel_gs_base()
1316 vmx->msr_guest_kernel_gs_base = data; in vmx_write_guest_kernel_gs_base()
1324 bool already_loaded = vmx->loaded_vmcs->cpu == cpu; in vmx_vcpu_load_vmcs()
1328 loaded_vmcs_clear(vmx->loaded_vmcs); in vmx_vcpu_load_vmcs()
1332 * Ensure loaded_vmcs->cpu is read before adding loaded_vmcs to in vmx_vcpu_load_vmcs()
1339 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link, in vmx_vcpu_load_vmcs()
1345 if (prev != vmx->loaded_vmcs->vmcs) { in vmx_vcpu_load_vmcs()
1346 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs; in vmx_vcpu_load_vmcs()
1347 vmcs_load(vmx->loaded_vmcs->vmcs); in vmx_vcpu_load_vmcs()
1351 * the active VMCS within a guest, e.g. on nested VM-Enter. in vmx_vcpu_load_vmcs()
1354 if (!buddy || WARN_ON_ONCE(buddy->vmcs != prev)) in vmx_vcpu_load_vmcs()
1368 * Linux uses per-cpu TSS and GDT, so set these when switching in vmx_vcpu_load_vmcs()
1372 (unsigned long)&get_cpu_entry_area(cpu)->tss.x86_tss); in vmx_vcpu_load_vmcs()
1381 vmx->loaded_vmcs->cpu = cpu; in vmx_vcpu_load_vmcs()
1397 vmx->host_debugctlmsr = get_debugctlmsr(); in vmx_vcpu_load()
1420 if (vmx->rmode.vm86_active) { in vmx_get_rflags()
1422 save_rflags = vmx->rmode.save_rflags; in vmx_get_rflags()
1425 vmx->rflags = rflags; in vmx_get_rflags()
1427 return vmx->rflags; in vmx_get_rflags()
1437 vmx->rflags = rflags; in vmx_set_rflags()
1443 vmx->rflags = rflags; in vmx_set_rflags()
1444 if (vmx->rmode.vm86_active) { in vmx_set_rflags()
1445 vmx->rmode.save_rflags = rflags; in vmx_set_rflags()
1450 if ((old_rflags ^ vmx->rflags) & X86_EFLAGS_VM) in vmx_set_rflags()
1451 vmx->emulation_required = vmx_emulation_required(vcpu); in vmx_set_rflags()
1497 if (data & vmx->pt_desc.ctl_bitmask) in vmx_rtit_ctl_check()
1504 if ((vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN) && in vmx_rtit_ctl_check()
1505 ((vmx->pt_desc.guest.ctl ^ data) & ~RTIT_CTL_TRACEEN)) in vmx_rtit_ctl_check()
1511 * CPUID.(EAX=14H, ECX=0):ECX.SNGLRGNOUT[bit 2] = 0 in vmx_rtit_ctl_check()
1515 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1523 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc_periods); in vmx_rtit_ctl_check()
1524 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc) && in vmx_rtit_ctl_check()
1528 value = intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_rtit_ctl_check()
1530 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1534 value = intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_periods); in vmx_rtit_ctl_check()
1535 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc) && in vmx_rtit_ctl_check()
1545 if ((value && (vmx->pt_desc.num_address_ranges < 1)) || (value > 2)) in vmx_rtit_ctl_check()
1548 if ((value && (vmx->pt_desc.num_address_ranges < 2)) || (value > 2)) in vmx_rtit_ctl_check()
1551 if ((value && (vmx->pt_desc.num_address_ranges < 3)) || (value > 2)) in vmx_rtit_ctl_check()
1554 if ((value && (vmx->pt_desc.num_address_ranges < 4)) || (value > 2)) in vmx_rtit_ctl_check()
1570 if (to_vmx(vcpu)->exit_reason.enclave_mode) { in vmx_can_emulate_instruction()
1579 union vmx_exit_reason exit_reason = to_vmx(vcpu)->exit_reason; in skip_emulated_instruction()
1588 * (namely Hyper-V) don't set it due to it being undefined behavior, in skip_emulated_instruction()
1599 * the RIP that actually triggered the VM-Exit. But, because in skip_emulated_instruction()
1600 * most instructions that cause VM-Exit will #UD in an enclave, in skip_emulated_instruction()
1601 * most instruction-based VM-Exits simply do not occur. in skip_emulated_instruction()
1608 * WARN if KVM tries to skip a non-zero length instruction on in skip_emulated_instruction()
1609 * a VM-Exit from an enclave. in skip_emulated_instruction()
1615 "KVM: skipping instruction after SGX enclave VM-Exit"); in skip_emulated_instruction()
1621 * We need to mask out the high 32 bits of RIP if not in 64-bit in skip_emulated_instruction()
1622 * mode, but just finding out that we are in 64-bit mode is in skip_emulated_instruction()
1642 * Recognizes a pending MTF VM-exit and records the nested state for later
1654 * Per the SDM, MTF takes priority over debug-trap exceptions besides in vmx_update_emulated_instruction()
1655 * TSS T-bit traps and ICEBP (INT1). KVM doesn't emulate T-bit traps in vmx_update_emulated_instruction()
1657 * intercepted #DB deliberately avoids single-step #DB and MTF updates in vmx_update_emulated_instruction()
1660 * any #DB exception pending delivery must be a debug-trap of lower in vmx_update_emulated_instruction()
1665 (!vcpu->arch.exception.pending || in vmx_update_emulated_instruction()
1666 vcpu->arch.exception.vector == DB_VECTOR) && in vmx_update_emulated_instruction()
1667 (!vcpu->arch.exception_vmexit.pending || in vmx_update_emulated_instruction()
1668 vcpu->arch.exception_vmexit.vector == DB_VECTOR)) { in vmx_update_emulated_instruction()
1669 vmx->nested.mtf_pending = true; in vmx_update_emulated_instruction()
1672 vmx->nested.mtf_pending = false; in vmx_update_emulated_instruction()
1690 if (kvm_hlt_in_guest(vcpu->kvm) && in vmx_clear_hlt()
1697 struct kvm_queued_exception *ex = &vcpu->arch.exception; in vmx_inject_exception()
1698 u32 intr_info = ex->vector | INTR_INFO_VALID_MASK; in vmx_inject_exception()
1703 if (ex->has_error_code) { in vmx_inject_exception()
1710 * ABI lets userspace shove in arbitrary 32-bit values. Drop in vmx_inject_exception()
1711 * the upper bits to avoid VM-Fail, losing information that in vmx_inject_exception()
1714 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)ex->error_code); in vmx_inject_exception()
1718 if (vmx->rmode.vm86_active) { in vmx_inject_exception()
1720 if (kvm_exception_is_soft(ex->vector)) in vmx_inject_exception()
1721 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_exception()
1722 kvm_inject_realmode_interrupt(vcpu, ex->vector, inc_eip); in vmx_inject_exception()
1726 WARN_ON_ONCE(vmx->emulation_required); in vmx_inject_exception()
1728 if (kvm_exception_is_soft(ex->vector)) { in vmx_inject_exception()
1730 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_exception()
1749 uret_msr->load_into_hardware = load_into_hardware; in vmx_setup_uret_msr()
1767 load_syscall_msrs = is_long_mode(&vmx->vcpu) && in vmx_setup_uret_msrs()
1768 (vmx->vcpu.arch.efer & EFER_SCE); in vmx_setup_uret_msrs()
1777 guest_cpuid_has(&vmx->vcpu, X86_FEATURE_RDTSCP) || in vmx_setup_uret_msrs()
1778 guest_cpuid_has(&vmx->vcpu, X86_FEATURE_RDPID)); in vmx_setup_uret_msrs()
1790 * next VM-Enter. in vmx_setup_uret_msrs()
1792 vmx->guest_uret_msrs_loaded = false; in vmx_setup_uret_msrs()
1800 return vmcs12->tsc_offset; in vmx_get_l2_tsc_offset()
1811 return vmcs12->tsc_multiplier; in vmx_get_l2_tsc_multiplier()
1840 uint64_t valid_bits = to_vmx(vcpu)->msr_ia32_feature_control_valid_bits; in vmx_feature_control_msr_valid()
1847 switch (msr->index) { in vmx_get_msr_feature()
1851 return vmx_get_vmx_msr(&vmcs_config.nested, msr->index, &msr->data); in vmx_get_msr_feature()
1853 msr->data = vmx_get_perf_capabilities(); in vmx_get_msr_feature()
1861 * Reads an msr value (of 'msr_info->index') into 'msr_info->data'.
1862 * Returns 0 on success, non-0 otherwise.
1871 switch (msr_info->index) { in vmx_get_msr()
1874 msr_info->data = vmcs_readl(GUEST_FS_BASE); in vmx_get_msr()
1877 msr_info->data = vmcs_readl(GUEST_GS_BASE); in vmx_get_msr()
1880 msr_info->data = vmx_read_guest_kernel_gs_base(vmx); in vmx_get_msr()
1886 if (!msr_info->host_initiated && in vmx_get_msr()
1887 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_get_msr()
1891 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_get_msr()
1894 msr_info->data = vmx->msr_ia32_umwait_control; in vmx_get_msr()
1897 if (!msr_info->host_initiated && in vmx_get_msr()
1901 msr_info->data = to_vmx(vcpu)->spec_ctrl; in vmx_get_msr()
1904 msr_info->data = vmcs_read32(GUEST_SYSENTER_CS); in vmx_get_msr()
1907 msr_info->data = vmcs_readl(GUEST_SYSENTER_EIP); in vmx_get_msr()
1910 msr_info->data = vmcs_readl(GUEST_SYSENTER_ESP); in vmx_get_msr()
1914 (!msr_info->host_initiated && in vmx_get_msr()
1917 msr_info->data = vmcs_read64(GUEST_BNDCFGS); in vmx_get_msr()
1920 if (!msr_info->host_initiated && in vmx_get_msr()
1921 !(vmx->msr_ia32_feature_control & in vmx_get_msr()
1924 msr_info->data = vcpu->arch.mcg_ext_ctl; in vmx_get_msr()
1927 msr_info->data = vmx->msr_ia32_feature_control; in vmx_get_msr()
1930 if (!msr_info->host_initiated && in vmx_get_msr()
1933 msr_info->data = to_vmx(vcpu)->msr_ia32_sgxlepubkeyhash in vmx_get_msr()
1934 [msr_info->index - MSR_IA32_SGXLEPUBKEYHASH0]; in vmx_get_msr()
1939 if (vmx_get_vmx_msr(&vmx->nested.msrs, msr_info->index, in vmx_get_msr()
1940 &msr_info->data)) in vmx_get_msr()
1944 * instead of just ignoring the features, different Hyper-V in vmx_get_msr()
1949 if (!msr_info->host_initiated && guest_cpuid_has_evmcs(vcpu)) in vmx_get_msr()
1950 nested_evmcs_filter_control_msr(vcpu, msr_info->index, in vmx_get_msr()
1951 &msr_info->data); in vmx_get_msr()
1956 msr_info->data = vmx->pt_desc.guest.ctl; in vmx_get_msr()
1961 msr_info->data = vmx->pt_desc.guest.status; in vmx_get_msr()
1965 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1968 msr_info->data = vmx->pt_desc.guest.cr3_match; in vmx_get_msr()
1972 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1974 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1977 msr_info->data = vmx->pt_desc.guest.output_base; in vmx_get_msr()
1981 (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1983 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_get_msr()
1986 msr_info->data = vmx->pt_desc.guest.output_mask; in vmx_get_msr()
1989 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_get_msr()
1991 (index >= 2 * vmx->pt_desc.num_address_ranges)) in vmx_get_msr()
1994 msr_info->data = vmx->pt_desc.guest.addr_b[index / 2]; in vmx_get_msr()
1996 msr_info->data = vmx->pt_desc.guest.addr_a[index / 2]; in vmx_get_msr()
1999 msr_info->data = vmcs_read64(GUEST_IA32_DEBUGCTL); in vmx_get_msr()
2003 msr = vmx_find_uret_msr(vmx, msr_info->index); in vmx_get_msr()
2005 msr_info->data = msr->data; in vmx_get_msr()
2041 * Returns 0 on success, non-0 otherwise.
2049 u32 msr_index = msr_info->index; in vmx_set_msr()
2050 u64 data = msr_info->data; in vmx_set_msr()
2072 * Always intercepting WRMSR could incur non-negligible in vmx_set_msr()
2075 * upon the first write with a non-zero value (indicating in vmx_set_msr()
2083 vcpu->arch.xfd_no_write_intercept = true; in vmx_set_msr()
2090 get_vmcs12(vcpu)->guest_sysenter_cs = data; in vmx_set_msr()
2096 get_vmcs12(vcpu)->guest_sysenter_eip = data; in vmx_set_msr()
2103 get_vmcs12(vcpu)->guest_sysenter_esp = data; in vmx_set_msr()
2110 invalid = data & ~vmx_get_supported_debugctl(vcpu, msr_info->host_initiated); in vmx_set_msr()
2122 if (is_guest_mode(vcpu) && get_vmcs12(vcpu)->vm_exit_controls & in vmx_set_msr()
2124 get_vmcs12(vcpu)->guest_ia32_debugctl = data; in vmx_set_msr()
2127 if (intel_pmu_lbr_is_enabled(vcpu) && !to_vmx(vcpu)->lbr_desc.event && in vmx_set_msr()
2134 (!msr_info->host_initiated && in vmx_set_msr()
2142 ((vmx->nested.msrs.entry_ctls_high & VM_ENTRY_LOAD_BNDCFGS) || in vmx_set_msr()
2143 (vmx->nested.msrs.exit_ctls_high & VM_EXIT_CLEAR_BNDCFGS))) in vmx_set_msr()
2144 get_vmcs12(vcpu)->guest_bndcfgs = data; in vmx_set_msr()
2149 if (!msr_info->host_initiated && !vmx_has_waitpkg(vmx)) in vmx_set_msr()
2152 /* The reserved bit 1 and non-32 bit [63:32] should be zero */ in vmx_set_msr()
2156 vmx->msr_ia32_umwait_control = data; in vmx_set_msr()
2159 if (!msr_info->host_initiated && in vmx_set_msr()
2166 vmx->spec_ctrl = data; in vmx_set_msr()
2171 * For non-nested: in vmx_set_msr()
2172 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2187 if (!msr_info->host_initiated && in vmx_set_msr()
2188 !(vcpu->arch.arch_capabilities & ARCH_CAP_TSX_CTRL_MSR)) in vmx_set_msr()
2194 if (!msr_info->host_initiated && in vmx_set_msr()
2208 * For non-nested: in vmx_set_msr()
2209 * When it's written (to non-zero) for the first time, pass in vmx_set_msr()
2225 get_vmcs12(vcpu)->vm_exit_controls & VM_EXIT_SAVE_IA32_PAT) in vmx_set_msr()
2226 get_vmcs12(vcpu)->guest_ia32_pat = data; in vmx_set_msr()
2230 vcpu->arch.pat = data; in vmx_set_msr()
2236 if ((!msr_info->host_initiated && in vmx_set_msr()
2237 !(to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2241 vcpu->arch.mcg_ext_ctl = data; in vmx_set_msr()
2245 (to_vmx(vcpu)->msr_ia32_feature_control & in vmx_set_msr()
2246 FEAT_CTL_LOCKED && !msr_info->host_initiated)) in vmx_set_msr()
2248 vmx->msr_ia32_feature_control = data; in vmx_set_msr()
2249 if (msr_info->host_initiated && data == 0) in vmx_set_msr()
2267 if (!msr_info->host_initiated && in vmx_set_msr()
2269 ((vmx->msr_ia32_feature_control & FEAT_CTL_LOCKED) && in vmx_set_msr()
2270 !(vmx->msr_ia32_feature_control & FEAT_CTL_SGX_LC_ENABLED)))) in vmx_set_msr()
2272 vmx->msr_ia32_sgxlepubkeyhash in vmx_set_msr()
2273 [msr_index - MSR_IA32_SGXLEPUBKEYHASH0] = data; in vmx_set_msr()
2276 if (!msr_info->host_initiated) in vmx_set_msr()
2277 return 1; /* they are read-only */ in vmx_set_msr()
2284 vmx->nested.vmxon) in vmx_set_msr()
2287 vmx->pt_desc.guest.ctl = data; in vmx_set_msr()
2295 vmx->pt_desc.guest.status = data; in vmx_set_msr()
2300 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2303 vmx->pt_desc.guest.cr3_match = data; in vmx_set_msr()
2308 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2310 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2315 vmx->pt_desc.guest.output_base = data; in vmx_set_msr()
2320 if (!intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2322 !intel_pt_validate_cap(vmx->pt_desc.caps, in vmx_set_msr()
2325 vmx->pt_desc.guest.output_mask = data; in vmx_set_msr()
2330 index = msr_info->index - MSR_IA32_RTIT_ADDR0_A; in vmx_set_msr()
2331 if (index >= 2 * vmx->pt_desc.num_address_ranges) in vmx_set_msr()
2336 vmx->pt_desc.guest.addr_b[index / 2] = data; in vmx_set_msr()
2338 vmx->pt_desc.guest.addr_a[index / 2] = data; in vmx_set_msr()
2341 if (data && !vcpu_to_pmu(vcpu)->version) in vmx_set_msr()
2388 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP); in vmx_cache_reg()
2391 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP); in vmx_cache_reg()
2398 guest_owned_bits = vcpu->arch.cr0_guest_owned_bits; in vmx_cache_reg()
2400 vcpu->arch.cr0 &= ~guest_owned_bits; in vmx_cache_reg()
2401 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & guest_owned_bits; in vmx_cache_reg()
2409 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3); in vmx_cache_reg()
2412 guest_owned_bits = vcpu->arch.cr4_guest_owned_bits; in vmx_cache_reg()
2414 vcpu->arch.cr4 &= ~guest_owned_bits; in vmx_cache_reg()
2415 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & guest_owned_bits; in vmx_cache_reg()
2418 KVM_BUG_ON(1, vcpu->kvm); in vmx_cache_reg()
2451 return -EFAULT; in kvm_cpu_vmxon()
2461 return -EBUSY; in vmx_hardware_enable()
2464 * This can happen if we hot-added a CPU but failed to allocate in vmx_hardware_enable()
2469 return -EFAULT; in vmx_hardware_enable()
2553 return -EIO; in adjust_vmx_controls()
2603 return -EIO; in setup_vmcs_config()
2609 return -EIO; in setup_vmcs_config()
2624 &vmx_cap->ept, &vmx_cap->vpid); in setup_vmcs_config()
2627 vmx_cap->ept) { in setup_vmcs_config()
2629 "1-setting enable EPT VM-execution control\n"); in setup_vmcs_config()
2632 return -EIO; in setup_vmcs_config()
2634 vmx_cap->ept = 0; in setup_vmcs_config()
2637 vmx_cap->vpid) { in setup_vmcs_config()
2639 "1-setting enable VPID VM-execution control\n"); in setup_vmcs_config()
2642 return -EIO; in setup_vmcs_config()
2644 vmx_cap->vpid = 0; in setup_vmcs_config()
2659 return -EIO; in setup_vmcs_config()
2665 return -EIO; in setup_vmcs_config()
2677 return -EIO; in setup_vmcs_config()
2686 pr_warn_once("Inconsistent VM-Entry/VM-Exit pair, entry = %x, exit = %x\n", in setup_vmcs_config()
2690 return -EIO; in setup_vmcs_config()
2698 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ in setup_vmcs_config()
2700 return -EIO; in setup_vmcs_config()
2703 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */ in setup_vmcs_config()
2705 return -EIO; in setup_vmcs_config()
2708 /* Require Write-Back (WB) memory type for VMCS accesses. */ in setup_vmcs_config()
2710 return -EIO; in setup_vmcs_config()
2714 vmcs_conf->size = vmx_msr_high & 0x1fff; in setup_vmcs_config()
2715 vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff; in setup_vmcs_config()
2717 vmcs_conf->revision_id = vmx_msr_low; in setup_vmcs_config()
2719 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control; in setup_vmcs_config()
2720 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control; in setup_vmcs_config()
2721 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control; in setup_vmcs_config()
2722 vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control; in setup_vmcs_config()
2723 vmcs_conf->vmexit_ctrl = _vmexit_control; in setup_vmcs_config()
2724 vmcs_conf->vmentry_ctrl = _vmentry_control; in setup_vmcs_config()
2725 vmcs_conf->misc = misc_msr; in setup_vmcs_config()
2744 vmcs->hdr.revision_id = KVM_EVMCS_VERSION; in alloc_vmcs_cpu()
2746 vmcs->hdr.revision_id = vmcs_config.revision_id; in alloc_vmcs_cpu()
2749 vmcs->hdr.shadow_vmcs = 1; in alloc_vmcs_cpu()
2763 if (!loaded_vmcs->vmcs) in free_loaded_vmcs()
2766 free_vmcs(loaded_vmcs->vmcs); in free_loaded_vmcs()
2767 loaded_vmcs->vmcs = NULL; in free_loaded_vmcs()
2768 if (loaded_vmcs->msr_bitmap) in free_loaded_vmcs()
2769 free_page((unsigned long)loaded_vmcs->msr_bitmap); in free_loaded_vmcs()
2770 WARN_ON(loaded_vmcs->shadow_vmcs != NULL); in free_loaded_vmcs()
2775 loaded_vmcs->vmcs = alloc_vmcs(false); in alloc_loaded_vmcs()
2776 if (!loaded_vmcs->vmcs) in alloc_loaded_vmcs()
2777 return -ENOMEM; in alloc_loaded_vmcs()
2779 vmcs_clear(loaded_vmcs->vmcs); in alloc_loaded_vmcs()
2781 loaded_vmcs->shadow_vmcs = NULL; in alloc_loaded_vmcs()
2782 loaded_vmcs->hv_timer_soft_disabled = false; in alloc_loaded_vmcs()
2783 loaded_vmcs->cpu = -1; in alloc_loaded_vmcs()
2784 loaded_vmcs->launched = 0; in alloc_loaded_vmcs()
2787 loaded_vmcs->msr_bitmap = (unsigned long *) in alloc_loaded_vmcs()
2789 if (!loaded_vmcs->msr_bitmap) in alloc_loaded_vmcs()
2791 memset(loaded_vmcs->msr_bitmap, 0xff, PAGE_SIZE); in alloc_loaded_vmcs()
2794 memset(&loaded_vmcs->host_state, 0, sizeof(struct vmcs_host_state)); in alloc_loaded_vmcs()
2795 memset(&loaded_vmcs->controls_shadow, 0, in alloc_loaded_vmcs()
2802 return -ENOMEM; in alloc_loaded_vmcs()
2825 return -ENOMEM; in alloc_kvm_area()
2830 * vmcs->revision_id to KVM_EVMCS_VERSION instead of in alloc_kvm_area()
2839 vmcs->hdr.revision_id = vmcs_config.revision_id; in alloc_kvm_area()
2858 save->selector &= ~SEGMENT_RPL_MASK; in fix_pmode_seg()
2859 save->dpl = save->selector & SEGMENT_RPL_MASK; in fix_pmode_seg()
2860 save->s = 1; in fix_pmode_seg()
2871 * Update real mode segment cache. It may be not up-to-date if segment in enter_pmode()
2874 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_pmode()
2875 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_pmode()
2876 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_pmode()
2877 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_pmode()
2878 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_pmode()
2879 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_pmode()
2881 vmx->rmode.vm86_active = 0; in enter_pmode()
2883 __vmx_set_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_pmode()
2887 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS; in enter_pmode()
2895 fix_pmode_seg(vcpu, VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_pmode()
2896 fix_pmode_seg(vcpu, VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_pmode()
2897 fix_pmode_seg(vcpu, VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_pmode()
2898 fix_pmode_seg(vcpu, VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_pmode()
2899 fix_pmode_seg(vcpu, VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_pmode()
2900 fix_pmode_seg(vcpu, VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_pmode()
2924 if (save->base & 0xf) in fix_rmode_seg()
2930 vmcs_write16(sf->selector, var.selector); in fix_rmode_seg()
2931 vmcs_writel(sf->base, var.base); in fix_rmode_seg()
2932 vmcs_write32(sf->limit, var.limit); in fix_rmode_seg()
2933 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(&var)); in fix_rmode_seg()
2940 struct kvm_vmx *kvm_vmx = to_kvm_vmx(vcpu->kvm); in enter_rmode()
2942 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_TR], VCPU_SREG_TR); in enter_rmode()
2943 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_ES], VCPU_SREG_ES); in enter_rmode()
2944 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_DS], VCPU_SREG_DS); in enter_rmode()
2945 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_FS], VCPU_SREG_FS); in enter_rmode()
2946 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_GS], VCPU_SREG_GS); in enter_rmode()
2947 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_SS], VCPU_SREG_SS); in enter_rmode()
2948 vmx_get_segment(vcpu, &vmx->rmode.segs[VCPU_SREG_CS], VCPU_SREG_CS); in enter_rmode()
2950 vmx->rmode.vm86_active = 1; in enter_rmode()
2956 if (!kvm_vmx->tss_addr) in enter_rmode()
2962 vmcs_writel(GUEST_TR_BASE, kvm_vmx->tss_addr); in enter_rmode()
2963 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1); in enter_rmode()
2967 vmx->rmode.save_rflags = flags; in enter_rmode()
2975 fix_rmode_seg(VCPU_SREG_SS, &vmx->rmode.segs[VCPU_SREG_SS]); in enter_rmode()
2976 fix_rmode_seg(VCPU_SREG_CS, &vmx->rmode.segs[VCPU_SREG_CS]); in enter_rmode()
2977 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.segs[VCPU_SREG_ES]); in enter_rmode()
2978 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.segs[VCPU_SREG_DS]); in enter_rmode()
2979 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.segs[VCPU_SREG_GS]); in enter_rmode()
2980 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.segs[VCPU_SREG_FS]); in enter_rmode()
2991 vcpu->arch.efer = efer; in vmx_set_efer()
2998 if (KVM_BUG_ON(efer & EFER_LMA, vcpu->kvm)) in vmx_set_efer()
3022 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA); in enter_lmode()
3027 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA); in exit_lmode()
3038 * the CPU is not required to invalidate guest-physical mappings on in vmx_flush_tlb_all()
3039 * VM-Entry, even if VPID is disabled. Guest-physical mappings are in vmx_flush_tlb_all()
3041 * (INVVPID also isn't required to invalidate guest-physical mappings). in vmx_flush_tlb_all()
3049 vpid_sync_vcpu_single(vmx->vpid); in vmx_flush_tlb_all()
3050 vpid_sync_vcpu_single(vmx->nested.vpid02); in vmx_flush_tlb_all()
3059 return to_vmx(vcpu)->vpid; in vmx_get_current_vpid()
3064 struct kvm_mmu *mmu = vcpu->arch.mmu; in vmx_flush_tlb_current()
3065 u64 root_hpa = mmu->root.hpa; in vmx_flush_tlb_current()
3073 mmu->root_role.level)); in vmx_flush_tlb_current()
3091 * vpid couldn't be allocated for this vCPU. VM-Enter and VM-Exit are in vmx_flush_tlb_guest()
3092 * required to flush GVA->{G,H}PA mappings from the TLB if vpid is in vmx_flush_tlb_guest()
3093 * disabled (VM-Enter with vpid enabled and vpid==0 is disallowed), in vmx_flush_tlb_guest()
3101 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in vmx_ept_load_pdptrs()
3107 vmcs_write64(GUEST_PDPTR0, mmu->pdptrs[0]); in vmx_ept_load_pdptrs()
3108 vmcs_write64(GUEST_PDPTR1, mmu->pdptrs[1]); in vmx_ept_load_pdptrs()
3109 vmcs_write64(GUEST_PDPTR2, mmu->pdptrs[2]); in vmx_ept_load_pdptrs()
3110 vmcs_write64(GUEST_PDPTR3, mmu->pdptrs[3]); in vmx_ept_load_pdptrs()
3116 struct kvm_mmu *mmu = vcpu->arch.walk_mmu; in ept_save_pdptrs()
3121 mmu->pdptrs[0] = vmcs_read64(GUEST_PDPTR0); in ept_save_pdptrs()
3122 mmu->pdptrs[1] = vmcs_read64(GUEST_PDPTR1); in ept_save_pdptrs()
3123 mmu->pdptrs[2] = vmcs_read64(GUEST_PDPTR2); in ept_save_pdptrs()
3124 mmu->pdptrs[3] = vmcs_read64(GUEST_PDPTR3); in ept_save_pdptrs()
3148 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE)) in vmx_set_cr0()
3151 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE)) in vmx_set_cr0()
3157 vcpu->arch.cr0 = cr0; in vmx_set_cr0()
3161 if (vcpu->arch.efer & EFER_LME) { in vmx_set_cr0()
3171 * Ensure KVM has an up-to-date snapshot of the guest's CR3. If in vmx_set_cr0()
3188 * e.g. after nested VM-Enter. in vmx_set_cr0()
3201 tmp |= get_vmcs12(vcpu)->cpu_based_vm_exec_control & CR3_EXITING_BITS; in vmx_set_cr0()
3205 /* Note, vmx_set_cr4() consumes the new vcpu->arch.cr0. */ in vmx_set_cr0()
3210 * When !CR0_PG -> CR0_PG, vcpu->arch.cr3 becomes active, but in vmx_set_cr0()
3211 * GUEST_CR3 is still vmx->ept_identity_map_addr if EPT + !URG. in vmx_set_cr0()
3217 /* depends on vcpu->arch.cr0 to be set to a new value */ in vmx_set_cr0()
3218 vmx->emulation_required = vmx_emulation_required(vcpu); in vmx_set_cr0()
3245 struct kvm *kvm = vcpu->kvm; in vmx_load_mmu_pgd()
3257 guest_cr3 = to_kvm_vmx(kvm)->ept_identity_map_addr; in vmx_load_mmu_pgd()
3259 guest_cr3 = vcpu->arch.cr3; in vmx_load_mmu_pgd()
3260 else /* vmcs.GUEST_CR3 is already up-to-date. */ in vmx_load_mmu_pgd()
3282 if (to_vmx(vcpu)->nested.vmxon && !nested_cr4_valid(vcpu, cr4)) in vmx_is_valid_cr4()
3290 unsigned long old_cr4 = vcpu->arch.cr4; in vmx_set_cr4()
3302 else if (vmx->rmode.vm86_active) in vmx_set_cr4()
3317 vcpu->arch.cr4 = cr4; in vmx_set_cr4()
3331 * SMEP/SMAP/PKU is disabled if CPU is in non-paging mode in in vmx_set_cr4()
3333 * to be manually disabled when guest switches to non-paging in vmx_set_cr4()
3357 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in vmx_get_segment()
3358 *var = vmx->rmode.segs[seg]; in vmx_get_segment()
3360 || var->selector == vmx_read_guest_seg_selector(vmx, seg)) in vmx_get_segment()
3362 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3363 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3366 var->base = vmx_read_guest_seg_base(vmx, seg); in vmx_get_segment()
3367 var->limit = vmx_read_guest_seg_limit(vmx, seg); in vmx_get_segment()
3368 var->selector = vmx_read_guest_seg_selector(vmx, seg); in vmx_get_segment()
3370 var->unusable = (ar >> 16) & 1; in vmx_get_segment()
3371 var->type = ar & 15; in vmx_get_segment()
3372 var->s = (ar >> 4) & 1; in vmx_get_segment()
3373 var->dpl = (ar >> 5) & 3; in vmx_get_segment()
3381 var->present = !var->unusable; in vmx_get_segment()
3382 var->avl = (ar >> 12) & 1; in vmx_get_segment()
3383 var->l = (ar >> 13) & 1; in vmx_get_segment()
3384 var->db = (ar >> 14) & 1; in vmx_get_segment()
3385 var->g = (ar >> 15) & 1; in vmx_get_segment()
3392 if (to_vmx(vcpu)->rmode.vm86_active) { in vmx_get_segment_base()
3403 if (unlikely(vmx->rmode.vm86_active)) in vmx_get_cpl()
3415 if (var->unusable || !var->present) in vmx_segment_access_rights()
3418 ar = var->type & 15; in vmx_segment_access_rights()
3419 ar |= (var->s & 1) << 4; in vmx_segment_access_rights()
3420 ar |= (var->dpl & 3) << 5; in vmx_segment_access_rights()
3421 ar |= (var->present & 1) << 7; in vmx_segment_access_rights()
3422 ar |= (var->avl & 1) << 12; in vmx_segment_access_rights()
3423 ar |= (var->l & 1) << 13; in vmx_segment_access_rights()
3424 ar |= (var->db & 1) << 14; in vmx_segment_access_rights()
3425 ar |= (var->g & 1) << 15; in vmx_segment_access_rights()
3438 if (vmx->rmode.vm86_active && seg != VCPU_SREG_LDTR) { in __vmx_set_segment()
3439 vmx->rmode.segs[seg] = *var; in __vmx_set_segment()
3441 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3442 else if (var->s) in __vmx_set_segment()
3443 fix_rmode_seg(seg, &vmx->rmode.segs[seg]); in __vmx_set_segment()
3447 vmcs_writel(sf->base, var->base); in __vmx_set_segment()
3448 vmcs_write32(sf->limit, var->limit); in __vmx_set_segment()
3449 vmcs_write16(sf->selector, var->selector); in __vmx_set_segment()
3463 var->type |= 0x1; /* Accessed */ in __vmx_set_segment()
3465 vmcs_write32(sf->ar_bytes, vmx_segment_access_rights(var)); in __vmx_set_segment()
3472 to_vmx(vcpu)->emulation_required = vmx_emulation_required(vcpu); in vmx_set_segment()
3485 dt->size = vmcs_read32(GUEST_IDTR_LIMIT); in vmx_get_idt()
3486 dt->address = vmcs_readl(GUEST_IDTR_BASE); in vmx_get_idt()
3491 vmcs_write32(GUEST_IDTR_LIMIT, dt->size); in vmx_set_idt()
3492 vmcs_writel(GUEST_IDTR_BASE, dt->address); in vmx_set_idt()
3497 dt->size = vmcs_read32(GUEST_GDTR_LIMIT); in vmx_get_gdt()
3498 dt->address = vmcs_readl(GUEST_GDTR_BASE); in vmx_get_gdt()
3503 vmcs_write32(GUEST_GDTR_LIMIT, dt->size); in vmx_set_gdt()
3504 vmcs_writel(GUEST_GDTR_BASE, dt->address); in vmx_set_gdt()
3693 * - Add checks on RIP in __vmx_guest_state_valid()
3694 * - Add checks on RFLAGS in __vmx_guest_state_valid()
3708 return -EFAULT; in init_rmode_tss()
3713 return -EFAULT; in init_rmode_tss()
3716 if (__copy_to_user(ua + RMODE_TSS_SIZE - 1, &data, sizeof(u8))) in init_rmode_tss()
3717 return -EFAULT; in init_rmode_tss()
3729 /* Protect kvm_vmx->ept_identity_pagetable_done. */ in init_rmode_identity_map()
3730 mutex_lock(&kvm->slots_lock); in init_rmode_identity_map()
3732 if (likely(kvm_vmx->ept_identity_pagetable_done)) in init_rmode_identity_map()
3735 if (!kvm_vmx->ept_identity_map_addr) in init_rmode_identity_map()
3736 kvm_vmx->ept_identity_map_addr = VMX_EPT_IDENTITY_PAGETABLE_ADDR; in init_rmode_identity_map()
3740 kvm_vmx->ept_identity_map_addr, in init_rmode_identity_map()
3747 /* Set up identity-mapping pagetable for EPT in real mode */ in init_rmode_identity_map()
3752 r = -EFAULT; in init_rmode_identity_map()
3756 kvm_vmx->ept_identity_pagetable_done = true; in init_rmode_identity_map()
3759 mutex_unlock(&kvm->slots_lock); in init_rmode_identity_map()
3768 vmcs_write16(sf->selector, 0); in seg_setup()
3769 vmcs_writel(sf->base, 0); in seg_setup()
3770 vmcs_write32(sf->limit, 0xffff); in seg_setup()
3775 vmcs_write32(sf->ar_bytes, ar); in seg_setup()
3784 mutex_lock(&kvm->slots_lock); in alloc_apic_access_page()
3785 if (kvm->arch.apic_access_memslot_enabled) in alloc_apic_access_page()
3796 ret = -EFAULT; in alloc_apic_access_page()
3801 * Do not pin the page in memory, so that memory hot-unplug in alloc_apic_access_page()
3805 kvm->arch.apic_access_memslot_enabled = true; in alloc_apic_access_page()
3807 mutex_unlock(&kvm->slots_lock); in alloc_apic_access_page()
3839 * When KVM is a nested hypervisor on top of Hyper-V and uses in vmx_msr_bitmap_l01_changed()
3846 vmx->nested.force_msr_bitmap_recalc = true; in vmx_msr_bitmap_l01_changed()
3852 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_disable_intercept_for_msr()
3866 if (idx != -ENOENT) { in vmx_disable_intercept_for_msr()
3868 clear_bit(idx, vmx->shadow_msr_intercept.read); in vmx_disable_intercept_for_msr()
3870 clear_bit(idx, vmx->shadow_msr_intercept.write); in vmx_disable_intercept_for_msr()
3896 unsigned long *msr_bitmap = vmx->vmcs01.msr_bitmap; in vmx_enable_intercept_for_msr()
3910 if (idx != -ENOENT) { in vmx_enable_intercept_for_msr()
3912 set_bit(idx, vmx->shadow_msr_intercept.read); in vmx_enable_intercept_for_msr()
3914 set_bit(idx, vmx->shadow_msr_intercept.write); in vmx_enable_intercept_for_msr()
3927 unsigned long *msr_bitmap = to_vmx(vcpu)->vmcs01.msr_bitmap; in vmx_reset_x2apic_msrs()
3960 if (mode == vmx->x2apic_msr_bitmap_mode) in vmx_update_msr_bitmap_x2apic()
3963 vmx->x2apic_msr_bitmap_mode = mode; in vmx_update_msr_bitmap_x2apic()
3986 bool flag = !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN); in pt_update_intercept_for_msr()
3993 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) { in pt_update_intercept_for_msr()
4008 WARN_ON_ONCE(!vmx->nested.virtual_apic_map.gfn)) in vmx_guest_apic_has_interrupt()
4013 vapic_page = vmx->nested.virtual_apic_map.hva; in vmx_guest_apic_has_interrupt()
4035 if (!test_bit(i, vmx->shadow_msr_intercept.read)) in vmx_msr_filter_changed()
4038 if (!test_bit(i, vmx->shadow_msr_intercept.write)) in vmx_msr_filter_changed()
4051 if (vcpu->mode == IN_GUEST_MODE) { in kvm_vcpu_trigger_posted_interrupt()
4056 * event is being sent from a fastpath VM-Exit handler, in in kvm_vcpu_trigger_posted_interrupt()
4058 * re-entering the guest. in kvm_vcpu_trigger_posted_interrupt()
4063 * Case 1: vCPU stays in non-root mode. Sending a notification in kvm_vcpu_trigger_posted_interrupt()
4067 * PIR will be synced to the vIRR before re-entering the guest. in kvm_vcpu_trigger_posted_interrupt()
4079 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), pi_vec); in kvm_vcpu_trigger_posted_interrupt()
4086 * IRQ via ->sync_pir_to_irr() in vcpu_enter_guest(). in kvm_vcpu_trigger_posted_interrupt()
4097 vector == vmx->nested.posted_intr_nv) { in vmx_deliver_nested_posted_interrupt()
4102 vmx->nested.pi_pending = true; in vmx_deliver_nested_posted_interrupt()
4106 * This pairs with the smp_mb_*() after setting vcpu->mode in in vmx_deliver_nested_posted_interrupt()
4109 * vcpu->mode != IN_GUEST_MODE. The extra barrier is needed as in vmx_deliver_nested_posted_interrupt()
4113 * vcpu->requests and the load from vcpu->mode. in vmx_deliver_nested_posted_interrupt()
4121 return -1; in vmx_deliver_nested_posted_interrupt()
4125 * 1. If target vcpu is running(non-root mode), send posted interrupt
4139 /* Note, this is called iff the local APIC is in-kernel. */ in vmx_deliver_posted_interrupt()
4140 if (!vcpu->arch.apic->apicv_active) in vmx_deliver_posted_interrupt()
4141 return -1; in vmx_deliver_posted_interrupt()
4143 if (pi_test_and_set_pir(vector, &vmx->pi_desc)) in vmx_deliver_posted_interrupt()
4147 if (pi_test_and_set_on(&vmx->pi_desc)) in vmx_deliver_posted_interrupt()
4152 * after setting vcpu->mode in vcpu_enter_guest(), thus the vCPU is in vmx_deliver_posted_interrupt()
4154 * posted interrupt "fails" because vcpu->mode != IN_GUEST_MODE. in vmx_deliver_posted_interrupt()
4163 struct kvm_vcpu *vcpu = apic->vcpu; in vmx_deliver_interrupt()
4170 trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, in vmx_deliver_interrupt()
4176 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
4178 * Note that host-state that does change is set elsewhere. E.g., host-state
4197 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_set_constant_host_state()
4202 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_set_constant_host_state()
4228 * SYSENTER is used for 32-bit system calls on either 32-bit or in vmx_set_constant_host_state()
4229 * 64-bit kernels. It is always zero If neither is allowed, otherwise in vmx_set_constant_host_state()
4230 * vmx_vcpu_load_vmcs loads it with the per-CPU entry stack (and may in vmx_set_constant_host_state()
4250 struct kvm_vcpu *vcpu = &vmx->vcpu; in set_cr4_guest_host_mask()
4252 vcpu->arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS & in set_cr4_guest_host_mask()
4253 ~vcpu->arch.cr4_guest_rsvd_bits; in set_cr4_guest_host_mask()
4255 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_TLBFLUSH_BITS; in set_cr4_guest_host_mask()
4256 vcpu->arch.cr4_guest_owned_bits &= ~X86_CR4_PDPTR_BITS; in set_cr4_guest_host_mask()
4258 if (is_guest_mode(&vmx->vcpu)) in set_cr4_guest_host_mask()
4259 vcpu->arch.cr4_guest_owned_bits &= in set_cr4_guest_host_mask()
4260 ~get_vmcs12(vcpu)->cr4_guest_host_mask; in set_cr4_guest_host_mask()
4261 vmcs_writel(CR4_GUEST_HOST_MASK, ~vcpu->arch.cr4_guest_owned_bits); in set_cr4_guest_host_mask()
4268 if (!kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_pin_based_exec_ctrl()
4328 vmx->nested.update_vmcs01_apicv_status = true; in vmx_refresh_apicv_exec_ctrl()
4368 if (vmx->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT) in vmx_exec_control()
4371 if (!cpu_need_tpr_shadow(&vmx->vcpu)) in vmx_exec_control()
4387 if (kvm_mwait_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4390 if (kvm_hlt_in_guest(vmx->vcpu.kvm)) in vmx_exec_control()
4403 if (!enable_ipiv || !kvm_vcpu_apicv_active(&vmx->vcpu)) in vmx_tertiary_exec_control()
4419 * If the control is for an opt-in feature, clear the control if the in vmx_adjust_secondary_exec_control()
4421 * control is opt-out, i.e. an exiting control, clear the control if in vmx_adjust_secondary_exec_control()
4435 vmx->nested.msrs.secondary_ctls_high |= control; in vmx_adjust_secondary_exec_control()
4437 vmx->nested.msrs.secondary_ctls_high &= ~control; in vmx_adjust_secondary_exec_control()
4451 __enabled = guest_cpuid_has(&(vmx)->vcpu, \
4458 /* More macro magic for ENABLE_/opt-in versus _EXITING/opt-out controls. */
4467 struct kvm_vcpu *vcpu = &vmx->vcpu; in vmx_secondary_exec_control()
4475 if (vmx->vpid == 0) in vmx_secondary_exec_control()
4483 if (kvm_pause_in_guest(vmx->vcpu.kvm)) in vmx_secondary_exec_control()
4506 if (!vcpu->kvm->arch.cpu_dirty_logging_count) in vmx_secondary_exec_control()
4516 vcpu->arch.xsaves_enabled = xsaves_enabled; in vmx_secondary_exec_control()
4548 if (!vcpu->kvm->arch.bus_lock_detection_enabled) in vmx_secondary_exec_control()
4551 if (!kvm_notify_vmexit_enabled(vcpu->kvm)) in vmx_secondary_exec_control()
4559 return get_order(kvm->arch.max_vcpu_ids * sizeof(*to_kvm_vmx(kvm)->pid_table)); in vmx_get_pid_table_order()
4570 if (kvm_vmx->pid_table) in vmx_alloc_ipiv_pid_table()
4575 return -ENOMEM; in vmx_alloc_ipiv_pid_table()
4577 kvm_vmx->pid_table = (void *)page_address(pages); in vmx_alloc_ipiv_pid_table()
4590 struct kvm *kvm = vmx->vcpu.kvm; in init_vmcs()
4597 vmcs_write64(MSR_BITMAP, __pa(vmx->vmcs01.msr_bitmap)); in init_vmcs()
4612 if (enable_apicv && lapic_in_kernel(&vmx->vcpu)) { in init_vmcs()
4621 vmcs_write64(POSTED_INTR_DESC_ADDR, __pa((&vmx->pi_desc))); in init_vmcs()
4624 if (vmx_can_use_ipiv(&vmx->vcpu)) { in init_vmcs()
4625 vmcs_write64(PID_POINTER_TABLE, __pa(kvm_vmx->pid_table)); in init_vmcs()
4626 vmcs_write16(LAST_PID_POINTER_INDEX, kvm->arch.max_vcpu_ids - 1); in init_vmcs()
4631 vmx->ple_window = ple_window; in init_vmcs()
4632 vmx->ple_window_dirty = true; in init_vmcs()
4636 vmcs_write32(NOTIFY_WINDOW, kvm->arch.notify_window); in init_vmcs()
4653 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host.val)); in init_vmcs()
4655 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest.val)); in init_vmcs()
4658 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat); in init_vmcs()
4665 vmx->vcpu.arch.cr0_guest_owned_bits = KVM_POSSIBLE_CR0_GUEST_BITS; in init_vmcs()
4666 vmcs_writel(CR0_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr0_guest_owned_bits); in init_vmcs()
4670 if (vmx->vpid != 0) in init_vmcs()
4671 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid); in init_vmcs()
4677 vmcs_write64(PML_ADDRESS, page_to_phys(vmx->pml_pg)); in init_vmcs()
4678 vmcs_write16(GUEST_PML_INDEX, PML_ENTITY_NUM - 1); in init_vmcs()
4681 vmx_write_encls_bitmap(&vmx->vcpu, NULL); in init_vmcs()
4684 memset(&vmx->pt_desc, 0, sizeof(vmx->pt_desc)); in init_vmcs()
4686 vmx->pt_desc.guest.output_mask = 0x7F; in init_vmcs()
4697 if (cpu_need_tpr_shadow(&vmx->vcpu)) in init_vmcs()
4699 __pa(vmx->vcpu.arch.apic->regs)); in init_vmcs()
4713 memcpy(&vmx->nested.msrs, &vmcs_config.nested, sizeof(vmx->nested.msrs)); in __vmx_vcpu_reset()
4717 vmx->nested.posted_intr_nv = -1; in __vmx_vcpu_reset()
4718 vmx->nested.vmxon_ptr = INVALID_GPA; in __vmx_vcpu_reset()
4719 vmx->nested.current_vmptr = INVALID_GPA; in __vmx_vcpu_reset()
4720 vmx->nested.hv_evmcs_vmptr = EVMPTR_INVALID; in __vmx_vcpu_reset()
4722 vcpu->arch.microcode_version = 0x100000000ULL; in __vmx_vcpu_reset()
4723 vmx->msr_ia32_feature_control_valid_bits = FEAT_CTL_LOCKED; in __vmx_vcpu_reset()
4729 vmx->pi_desc.nv = POSTED_INTR_VECTOR; in __vmx_vcpu_reset()
4730 vmx->pi_desc.sn = 1; in __vmx_vcpu_reset()
4740 vmx->rmode.vm86_active = 0; in vmx_vcpu_reset()
4741 vmx->spec_ctrl = 0; in vmx_vcpu_reset()
4743 vmx->msr_ia32_umwait_control = 0; in vmx_vcpu_reset()
4745 vmx->hv_deadline_tsc = -1; in vmx_vcpu_reset()
4787 vpid_sync_context(vmx->vpid); in vmx_vcpu_reset()
4812 int irq = vcpu->arch.interrupt.nr; in vmx_inject_irq()
4814 trace_kvm_inj_virq(irq, vcpu->arch.interrupt.soft, reinjected); in vmx_inject_irq()
4816 ++vcpu->stat.irq_injections; in vmx_inject_irq()
4817 if (vmx->rmode.vm86_active) { in vmx_inject_irq()
4819 if (vcpu->arch.interrupt.soft) in vmx_inject_irq()
4820 inc_eip = vcpu->arch.event_exit_inst_len; in vmx_inject_irq()
4825 if (vcpu->arch.interrupt.soft) { in vmx_inject_irq()
4828 vmx->vcpu.arch.event_exit_inst_len); in vmx_inject_irq()
4842 * Tracking the NMI-blocked state in software is built upon in vmx_inject_nmi()
4844 * well-behaving guests: They have to keep IRQs disabled at in vmx_inject_nmi()
4849 vmx->loaded_vmcs->soft_vnmi_blocked = 1; in vmx_inject_nmi()
4850 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_inject_nmi()
4853 ++vcpu->stat.nmi_injections; in vmx_inject_nmi()
4854 vmx->loaded_vmcs->nmi_known_unmasked = false; in vmx_inject_nmi()
4856 if (vmx->rmode.vm86_active) { in vmx_inject_nmi()
4873 return vmx->loaded_vmcs->soft_vnmi_blocked; in vmx_get_nmi_mask()
4874 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_get_nmi_mask()
4877 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_get_nmi_mask()
4886 if (vmx->loaded_vmcs->soft_vnmi_blocked != masked) { in vmx_set_nmi_mask()
4887 vmx->loaded_vmcs->soft_vnmi_blocked = masked; in vmx_set_nmi_mask()
4888 vmx->loaded_vmcs->vnmi_blocked_time = 0; in vmx_set_nmi_mask()
4891 vmx->loaded_vmcs->nmi_known_unmasked = !masked; in vmx_set_nmi_mask()
4906 if (!enable_vnmi && to_vmx(vcpu)->loaded_vmcs->soft_vnmi_blocked) in vmx_nmi_blocked()
4916 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_nmi_allowed()
4917 return -EBUSY; in vmx_nmi_allowed()
4919 /* An NMI must not be injected into L2 if it's supposed to VM-Exit. */ in vmx_nmi_allowed()
4921 return -EBUSY; in vmx_nmi_allowed()
4938 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_interrupt_allowed()
4939 return -EBUSY; in vmx_interrupt_allowed()
4942 * An IRQ must not be injected into L2 if it's supposed to VM-Exit, in vmx_interrupt_allowed()
4946 return -EBUSY; in vmx_interrupt_allowed()
4958 mutex_lock(&kvm->slots_lock); in vmx_set_tss_addr()
4961 mutex_unlock(&kvm->slots_lock); in vmx_set_tss_addr()
4966 to_kvm_vmx(kvm)->tss_addr = addr; in vmx_set_tss_addr()
4973 to_kvm_vmx(kvm)->ept_identity_map_addr = ident_addr; in vmx_set_identity_map_addr()
4985 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len = in rmode_exception()
4987 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) in rmode_exception()
4991 return !(vcpu->guest_debug & in rmode_exception()
5015 if (vcpu->arch.halt_request) { in handle_rmode_exception()
5016 vcpu->arch.halt_request = 0; in handle_rmode_exception()
5046 * - Guest CPL == 3 (user mode)
5047 * - Guest has #AC detection enabled in CR0
5048 * - Guest EFLAGS has AC bit set
5062 struct kvm_run *kvm_run = vcpu->run; in handle_exception_nmi()
5067 vect_info = vmx->idt_vectoring_info; in handle_exception_nmi()
5091 if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) { in handle_exception_nmi()
5096 * IN{S}, OUT{S}, and RDPMC, none of which generate a non-zero in handle_exception_nmi()
5113 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in handle_exception_nmi()
5114 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX; in handle_exception_nmi()
5115 vcpu->run->internal.ndata = 4; in handle_exception_nmi()
5116 vcpu->run->internal.data[0] = vect_info; in handle_exception_nmi()
5117 vcpu->run->internal.data[1] = intr_info; in handle_exception_nmi()
5118 vcpu->run->internal.data[2] = error_code; in handle_exception_nmi()
5119 vcpu->run->internal.data[3] = vcpu->arch.last_vmentry_cpu; in handle_exception_nmi()
5125 if (enable_ept && !vcpu->arch.apf.host_apf_flags) { in handle_exception_nmi()
5139 if (vmx->rmode.vm86_active && rmode_exception(vcpu, ex_no)) in handle_exception_nmi()
5145 if (!(vcpu->guest_debug & in handle_exception_nmi()
5149 * instruction. ICEBP generates a trap-like #DB, but in handle_exception_nmi()
5151 * is an instruction intercept, i.e. the VM-Exit occurs in handle_exception_nmi()
5153 * avoid single-step #DB and MTF updates, as ICEBP is in handle_exception_nmi()
5158 * if single-step is enabled in RFLAGS and STI or MOVSS in handle_exception_nmi()
5160 * on VM-Exit due to #DB interception. VM-Entry has a in handle_exception_nmi()
5161 * consistency check that a single-step #DB is pending in handle_exception_nmi()
5165 * delay when activating single-step breakpoints must in handle_exception_nmi()
5167 * as appropriate for all other VM-Exits types. in handle_exception_nmi()
5180 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW; in handle_exception_nmi()
5181 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7); in handle_exception_nmi()
5189 vmx->vcpu.arch.event_exit_inst_len = in handle_exception_nmi()
5191 kvm_run->exit_reason = KVM_EXIT_DEBUG; in handle_exception_nmi()
5192 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_exception_nmi()
5193 kvm_run->debug.arch.exception = ex_no; in handle_exception_nmi()
5210 kvm_run->exit_reason = KVM_EXIT_EXCEPTION; in handle_exception_nmi()
5211 kvm_run->ex.exception = ex_no; in handle_exception_nmi()
5212 kvm_run->ex.error_code = error_code; in handle_exception_nmi()
5220 ++vcpu->stat.irq_exits; in handle_external_interrupt()
5226 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN; in handle_triple_fault()
5227 vcpu->mmio_needed = 0; in handle_triple_fault()
5240 ++vcpu->stat.io_exits; in handle_io()
5263 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */
5275 * hardware. It consists of the L2-owned bits from the new in handle_set_cr0()
5276 * value combined with the L1-owned bits from L1's guest_cr0. in handle_set_cr0()
5278 val = (val & ~vmcs12->cr0_guest_host_mask) | in handle_set_cr0()
5279 (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask); in handle_set_cr0()
5289 if (to_vmx(vcpu)->nested.vmxon && in handle_set_cr0()
5304 val = (val & ~vmcs12->cr4_guest_host_mask) | in handle_set_cr4()
5305 (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask); in handle_set_cr4()
5316 WARN_ON(!(vcpu->arch.cr4 & X86_CR4_UMIP)); in handle_desc()
5358 * KVM_GUESTDBG_SINGLESTEP-triggered in handle_cr()
5361 vcpu->run->exit_reason = KVM_EXIT_SET_TPR; in handle_cr()
5367 KVM_BUG(1, vcpu->kvm, "Guest always owns CR0.TS"); in handle_cr()
5368 return -EIO; in handle_cr()
5394 vcpu->run->exit_reason = 0; in handle_cr()
5419 * As the vm-exit takes precedence over the debug trap, we in handle_dr()
5423 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) { in handle_dr()
5424 vcpu->run->debug.arch.dr6 = DR6_BD | DR6_ACTIVE_LOW; in handle_dr()
5425 vcpu->run->debug.arch.dr7 = dr7; in handle_dr()
5426 vcpu->run->debug.arch.pc = kvm_get_linear_rip(vcpu); in handle_dr()
5427 vcpu->run->debug.arch.exception = DB_VECTOR; in handle_dr()
5428 vcpu->run->exit_reason = KVM_EXIT_DEBUG; in handle_dr()
5436 if (vcpu->guest_debug == 0) { in handle_dr()
5444 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_WONT_EXIT; in handle_dr()
5465 get_debugreg(vcpu->arch.db[0], 0); in vmx_sync_dirty_debug_regs()
5466 get_debugreg(vcpu->arch.db[1], 1); in vmx_sync_dirty_debug_regs()
5467 get_debugreg(vcpu->arch.db[2], 2); in vmx_sync_dirty_debug_regs()
5468 get_debugreg(vcpu->arch.db[3], 3); in vmx_sync_dirty_debug_regs()
5469 get_debugreg(vcpu->arch.dr6, 6); in vmx_sync_dirty_debug_regs()
5470 vcpu->arch.dr7 = vmcs_readl(GUEST_DR7); in vmx_sync_dirty_debug_regs()
5472 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_WONT_EXIT; in vmx_sync_dirty_debug_regs()
5499 ++vcpu->stat.irq_window_exits; in handle_interrupt_window()
5521 * not cared. So make a short-circuit here by avoiding in handle_apic_access()
5538 /* EOI-induced VM exit is trap-like and thus no need to adjust IP */ in handle_apic_eoi_induced()
5548 * APIC-write VM-Exit is trap-like, KVM doesn't need to advance RIP and in handle_apic_write()
5551 * the vAPIC page for the correct 16-byte chunk. KVM needs only to in handle_apic_write()
5569 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK); in handle_task_switch()
5570 idt_index = (vmx->idt_vectoring_info & VECTORING_INFO_VECTOR_MASK); in handle_task_switch()
5571 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK); in handle_task_switch()
5579 vcpu->arch.nmi_injected = false; in handle_task_switch()
5587 if (vmx->idt_vectoring_info & in handle_task_switch()
5613 type == INTR_TYPE_SOFT_INTR ? idt_index : -1, in handle_task_switch()
5631 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_ept_violation()
5655 vcpu->arch.exit_qualification = exit_qualification; in handle_ept_violation()
5662 * would also use advanced VM-exit information for EPT violations to in handle_ept_violation()
5694 if (KVM_BUG_ON(!enable_vnmi, vcpu->kvm)) in handle_nmi_window()
5695 return -EIO; in handle_nmi_window()
5698 ++vcpu->stat.nmi_window_exits; in handle_nmi_window()
5708 return vmx->emulation_required && !vmx->rmode.vm86_active && in vmx_emulation_required_with_pending_exception()
5709 (kvm_is_exception_pending(vcpu) || vcpu->arch.exception.injected); in vmx_emulation_required_with_pending_exception()
5721 while (vmx->emulation_required && count-- != 0) { in handle_invalid_guest_state()
5723 return handle_interrupt_window(&vmx->vcpu); in handle_invalid_guest_state()
5736 if (vcpu->arch.halt_request) { in handle_invalid_guest_state()
5737 vcpu->arch.halt_request = 0; in handle_invalid_guest_state()
5766 unsigned int old = vmx->ple_window; in grow_ple_window()
5768 vmx->ple_window = __grow_ple_window(old, ple_window, in grow_ple_window()
5772 if (vmx->ple_window != old) { in grow_ple_window()
5773 vmx->ple_window_dirty = true; in grow_ple_window()
5774 trace_kvm_ple_window_update(vcpu->vcpu_id, in grow_ple_window()
5775 vmx->ple_window, old); in grow_ple_window()
5782 unsigned int old = vmx->ple_window; in shrink_ple_window()
5784 vmx->ple_window = __shrink_ple_window(old, ple_window, in shrink_ple_window()
5788 if (vmx->ple_window != old) { in shrink_ple_window()
5789 vmx->ple_window_dirty = true; in shrink_ple_window()
5790 trace_kvm_ple_window_update(vcpu->vcpu_id, in shrink_ple_window()
5791 vmx->ple_window, old); in shrink_ple_window()
5796 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
5797 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
5801 if (!kvm_pause_in_guest(vcpu->kvm)) in handle_pause()
5805 * Intel sdm vol3 ch-25.1.3 says: The "PAUSE-loop exiting" in handle_pause()
5806 * VM-execution control is ignored if CPL > 0. OTOH, KVM in handle_pause()
5854 trace_kvm_pml_full(vcpu->vcpu_id); in handle_pml_full()
5862 if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && in handle_pml_full()
5879 if (!vmx->req_immediate_exit && in handle_fastpath_preemption_timer()
5880 !unlikely(vmx->loaded_vmcs->hv_timer_soft_disabled)) { in handle_fastpath_preemption_timer()
5921 * VM-Exits. Unconditionally set the flag here and leave the handling to in handle_bus_lock_vmexit()
5924 to_vmx(vcpu)->exit_reason.bus_lock_detected = true; in handle_bus_lock_vmexit()
5933 ++vcpu->stat.notify_window_exits; in handle_notify()
5943 if (vcpu->kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_USER || in handle_notify()
5945 vcpu->run->exit_reason = KVM_EXIT_NOTIFY; in handle_notify()
5946 vcpu->run->notify.flags = context_invalid ? in handle_notify()
6023 *reason = vmx->exit_reason.full; in vmx_get_exit_info()
6025 if (!(vmx->exit_reason.failed_vmentry)) { in vmx_get_exit_info()
6026 *info2 = vmx->idt_vectoring_info; in vmx_get_exit_info()
6041 if (vmx->pml_pg) { in vmx_destroy_pml_buffer()
6042 __free_page(vmx->pml_pg); in vmx_destroy_pml_buffer()
6043 vmx->pml_pg = NULL; in vmx_destroy_pml_buffer()
6056 if (pml_idx == (PML_ENTITY_NUM - 1)) in vmx_flush_pml_buffer()
6065 pml_buf = page_address(vmx->pml_pg); in vmx_flush_pml_buffer()
6070 WARN_ON(gpa & (PAGE_SIZE - 1)); in vmx_flush_pml_buffer()
6075 vmcs_write16(GUEST_PML_INDEX, PML_ENTITY_NUM - 1); in vmx_flush_pml_buffer()
6082 vmcs_read32(sel + GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR), in vmx_dump_sel()
6083 vmcs_read32(sel + GUEST_ES_LIMIT - GUEST_ES_SELECTOR), in vmx_dump_sel()
6084 vmcs_readl(sel + GUEST_ES_BASE - GUEST_ES_SELECTOR)); in vmx_dump_sel()
6091 vmcs_readl(limit + GUEST_GDTR_BASE - GUEST_GDTR_LIMIT)); in vmx_dump_dtsel()
6100 for (i = 0, e = m->val; i < m->nr; ++i, ++e) in vmx_dump_msrs()
6101 pr_err(" %2d: msr=0x%08x value=0x%016llx\n", i, e->index, e->value); in vmx_dump_msrs()
6134 pr_err("VMCS %p, last attempted VM-entry on CPU %d\n", in dump_vmcs()
6135 vmx->loaded_vmcs->vmcs, vcpu->arch.last_vmentry_cpu); in dump_vmcs()
6166 efer_slot = vmx_find_loadstore_msr_slot(&vmx->msr_autoload.guest, MSR_EFER); in dump_vmcs()
6171 vmx->msr_autoload.guest.val[efer_slot].value); in dump_vmcs()
6174 vcpu->arch.efer | (EFER_LMA | EFER_LME)); in dump_vmcs()
6177 vcpu->arch.efer & ~(EFER_LMA | EFER_LME)); in dump_vmcs()
6196 vmx_dump_msrs("guest autoload", &vmx->msr_autoload.guest); in dump_vmcs()
6198 vmx_dump_msrs("guest autostore", &vmx->msr_autostore.guest); in dump_vmcs()
6229 vmx_dump_msrs("host autoload", &vmx->msr_autoload.host); in dump_vmcs()
6264 pr_err("APIC-access addr = 0x%016llx ", vmcs_read64(APIC_ACCESS_ADDR)); in dump_vmcs()
6265 pr_cont("virt-APIC addr = 0x%016llx\n", vmcs_read64(VIRTUAL_APIC_PAGE_ADDR)); in dump_vmcs()
6286 union vmx_exit_reason exit_reason = vmx->exit_reason; in __vmx_handle_exit()
6287 u32 vectoring_info = vmx->idt_vectoring_info; in __vmx_handle_exit()
6302 * KVM should never reach this point with a pending nested VM-Enter. in __vmx_handle_exit()
6303 * More specifically, short-circuiting VM-Entry to emulate L2 due to in __vmx_handle_exit()
6305 * allowed a nested VM-Enter with an invalid vmcs12. More below. in __vmx_handle_exit()
6307 if (KVM_BUG_ON(vmx->nested.nested_run_pending, vcpu->kvm)) in __vmx_handle_exit()
6308 return -EIO; in __vmx_handle_exit()
6323 * address-translation-based dirty tracking (e.g. EPT write in __vmx_handle_exit()
6333 * operation, nested VM-Enter rejects any attempt to enter L2 in __vmx_handle_exit()
6342 if (vmx->emulation_required) { in __vmx_handle_exit()
6352 if (vmx->emulation_required) in __vmx_handle_exit()
6357 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6358 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6360 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6364 if (unlikely(vmx->fail)) { in __vmx_handle_exit()
6366 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY; in __vmx_handle_exit()
6367 vcpu->run->fail_entry.hardware_entry_failure_reason in __vmx_handle_exit()
6369 vcpu->run->fail_entry.cpu = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6377 * The vm-exit can be triggered again after return to guest that in __vmx_handle_exit()
6389 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in __vmx_handle_exit()
6390 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_DELIVERY_EV; in __vmx_handle_exit()
6391 vcpu->run->internal.data[0] = vectoring_info; in __vmx_handle_exit()
6392 vcpu->run->internal.data[1] = exit_reason.full; in __vmx_handle_exit()
6393 vcpu->run->internal.data[2] = vcpu->arch.exit_qualification; in __vmx_handle_exit()
6395 vcpu->run->internal.data[ndata++] = in __vmx_handle_exit()
6398 vcpu->run->internal.data[ndata++] = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6399 vcpu->run->internal.ndata = ndata; in __vmx_handle_exit()
6404 vmx->loaded_vmcs->soft_vnmi_blocked)) { in __vmx_handle_exit()
6406 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6407 } else if (vmx->loaded_vmcs->vnmi_blocked_time > 1000000000LL && in __vmx_handle_exit()
6408 vcpu->arch.nmi_pending) { in __vmx_handle_exit()
6411 * NMI-blocked window if the guest runs with IRQs in __vmx_handle_exit()
6415 printk(KERN_WARNING "%s: Breaking out of NMI-blocked " in __vmx_handle_exit()
6417 __func__, vcpu->vcpu_id); in __vmx_handle_exit()
6418 vmx->loaded_vmcs->soft_vnmi_blocked = 0; in __vmx_handle_exit()
6453 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; in __vmx_handle_exit()
6454 vcpu->run->internal.suberror = in __vmx_handle_exit()
6456 vcpu->run->internal.ndata = 2; in __vmx_handle_exit()
6457 vcpu->run->internal.data[0] = exit_reason.full; in __vmx_handle_exit()
6458 vcpu->run->internal.data[1] = vcpu->arch.last_vmentry_cpu; in __vmx_handle_exit()
6470 if (to_vmx(vcpu)->exit_reason.bus_lock_detected) { in vmx_handle_exit()
6472 vcpu->run->exit_reason = KVM_EXIT_X86_BUS_LOCK; in vmx_handle_exit()
6474 vcpu->run->flags |= KVM_RUN_X86_BUS_LOCK; in vmx_handle_exit()
6502 * Clear the per-vcpu flush bit, it gets set again in vmx_l1d_flush()
6506 flush_l1d = vcpu->arch.l1tf_flush_l1d; in vmx_l1d_flush()
6507 vcpu->arch.l1tf_flush_l1d = false; in vmx_l1d_flush()
6510 * Clear the per-cpu flush bit, it gets set again from in vmx_l1d_flush()
6520 vcpu->stat.l1d_flush++; in vmx_l1d_flush()
6531 "movzbl (%[flush_pages], %%" _ASM_AX "), %%ecx\n\t" in vmx_l1d_flush()
6540 "movzbl (%[flush_pages], %%" _ASM_AX "), %%ecx\n\t" in vmx_l1d_flush()
6547 : "eax", "ebx", "ecx", "edx"); in vmx_l1d_flush()
6559 tpr_threshold = (irr == -1 || tpr < irr) ? 0 : irr; in vmx_update_cr8_intercept()
6561 to_vmx(vcpu)->nested.l1_tpr_threshold = tpr_threshold; in vmx_update_cr8_intercept()
6580 vmx->nested.change_vmcs01_virtual_apic_mode = true; in vmx_set_virtual_apic_mode()
6603 * the guest may have inserted a non-APIC mapping into in vmx_set_virtual_apic_mode()
6626 to_vmx(vcpu)->nested.reload_vmcs01_apic_access_page = true; in vmx_set_apic_access_page_addr()
6634 page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT); in vmx_set_apic_access_page_addr()
6653 if (max_isr == -1) in vmx_hwapic_isr_update()
6670 if (vector == -1) in vmx_set_rvi()
6686 * vmcs12 virtual-interrupt-delivery enabled. in vmx_hwapic_irr_update()
6688 * intercepts external-interrupts and in that case in vmx_hwapic_irr_update()
6702 if (KVM_BUG_ON(!enable_apicv, vcpu->kvm)) in vmx_sync_pir_to_irr()
6703 return -EIO; in vmx_sync_pir_to_irr()
6705 if (pi_test_on(&vmx->pi_desc)) { in vmx_sync_pir_to_irr()
6706 pi_clear_on(&vmx->pi_desc); in vmx_sync_pir_to_irr()
6713 kvm_apic_update_irr(vcpu, vmx->pi_desc.pir, &max_irr); in vmx_sync_pir_to_irr()
6726 * VM-Exit to L1. If L1 doesn't want to exit, the interrupt is injected in vmx_sync_pir_to_irr()
6732 * a VM-Exit and the subsequent entry will call sync_pir_to_irr. in vmx_sync_pir_to_irr()
6757 pi_clear_on(&vmx->pi_desc); in vmx_apicv_post_state_restore()
6758 memset(vmx->pi_desc.pir, 0, sizeof(vmx->pi_desc.pir)); in vmx_apicv_post_state_restore()
6785 * only when xfd contains a non-zero value. in handle_nm_fault_irqoff()
6789 if (vcpu->arch.guest_fpu.fpstate->xfd) in handle_nm_fault_irqoff()
6790 rdmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err); in handle_nm_fault_irqoff()
6796 u32 intr_info = vmx_get_intr_info(&vmx->vcpu); in handle_exception_nmi_irqoff()
6800 vmx->vcpu.arch.apf.host_apf_flags = kvm_read_and_reset_apf_flags(); in handle_exception_nmi_irqoff()
6803 handle_nm_fault_irqoff(&vmx->vcpu); in handle_exception_nmi_irqoff()
6809 handle_interrupt_nmi_irqoff(&vmx->vcpu, nmi_entry); in handle_exception_nmi_irqoff()
6818 if (KVM_BUG(!is_external_intr(intr_info), vcpu->kvm, in handle_external_interrupt_irqoff()
6819 "KVM: unexpected VM-Exit interrupt info: 0x%x", intr_info)) in handle_external_interrupt_irqoff()
6823 vcpu->arch.at_instruction_boundary = true; in handle_external_interrupt_irqoff()
6830 if (vmx->emulation_required) in vmx_handle_exit_irqoff()
6833 if (vmx->exit_reason.basic == EXIT_REASON_EXTERNAL_INTERRUPT) in vmx_handle_exit_irqoff()
6835 else if (vmx->exit_reason.basic == EXIT_REASON_EXCEPTION_NMI) in vmx_handle_exit_irqoff()
6870 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK; in vmx_recover_nmi_blocking()
6873 if (vmx->loaded_vmcs->nmi_known_unmasked) in vmx_recover_nmi_blocking()
6876 exit_intr_info = vmx_get_intr_info(&vmx->vcpu); in vmx_recover_nmi_blocking()
6881 * Re-set bit "block by NMI" before VM entry if vmexit caused by in vmx_recover_nmi_blocking()
6885 * If the VM exit sets the valid bit in the IDT-vectoring in vmx_recover_nmi_blocking()
6894 vmx->loaded_vmcs->nmi_known_unmasked = in vmx_recover_nmi_blocking()
6897 } else if (unlikely(vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_recover_nmi_blocking()
6898 vmx->loaded_vmcs->vnmi_blocked_time += in vmx_recover_nmi_blocking()
6900 vmx->loaded_vmcs->entry_time)); in vmx_recover_nmi_blocking()
6914 vcpu->arch.nmi_injected = false; in __vmx_complete_interrupts()
6928 vcpu->arch.nmi_injected = true; in __vmx_complete_interrupts()
6937 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
6947 vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field); in __vmx_complete_interrupts()
6959 __vmx_complete_interrupts(&vmx->vcpu, vmx->idt_vectoring_info, in vmx_complete_interrupts()
6978 struct kvm_pmu *pmu = vcpu_to_pmu(&vmx->vcpu); in atomic_switch_perf_msrs()
6980 pmu->host_cross_mapped_mask = 0; in atomic_switch_perf_msrs()
6981 if (pmu->pebs_enable & pmu->global_ctrl) in atomic_switch_perf_msrs()
7003 if (vmx->req_immediate_exit) { in vmx_update_hv_timer()
7005 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7006 } else if (vmx->hv_deadline_tsc != -1) { in vmx_update_hv_timer()
7008 if (vmx->hv_deadline_tsc > tscl) in vmx_update_hv_timer()
7009 /* set_hv_timer ensures the delta fits in 32-bits */ in vmx_update_hv_timer()
7010 delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >> in vmx_update_hv_timer()
7016 vmx->loaded_vmcs->hv_timer_soft_disabled = false; in vmx_update_hv_timer()
7017 } else if (!vmx->loaded_vmcs->hv_timer_soft_disabled) { in vmx_update_hv_timer()
7018 vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, -1); in vmx_update_hv_timer()
7019 vmx->loaded_vmcs->hv_timer_soft_disabled = true; in vmx_update_hv_timer()
7025 if (unlikely(host_rsp != vmx->loaded_vmcs->host_state.rsp)) { in vmx_update_host_rsp()
7026 vmx->loaded_vmcs->host_state.rsp = host_rsp; in vmx_update_host_rsp()
7040 vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL); in vmx_spec_ctrl_restore_host()
7050 vmx->spec_ctrl != hostval) in vmx_spec_ctrl_restore_host()
7058 switch (to_vmx(vcpu)->exit_reason.basic) { in vmx_exit_handlers_fastpath()
7080 kvm_arch_has_assigned_device(vcpu->kvm)) in vmx_vcpu_enter_exit()
7085 if (vcpu->arch.cr2 != native_read_cr2()) in vmx_vcpu_enter_exit()
7086 native_write_cr2(vcpu->arch.cr2); in vmx_vcpu_enter_exit()
7088 vmx->fail = __vmx_vcpu_run(vmx, (unsigned long *)&vcpu->arch.regs, in vmx_vcpu_enter_exit()
7091 vcpu->arch.cr2 = native_read_cr2(); in vmx_vcpu_enter_exit()
7105 vmx->loaded_vmcs->soft_vnmi_blocked)) in vmx_vcpu_run()
7106 vmx->loaded_vmcs->entry_time = ktime_get(); in vmx_vcpu_run()
7111 * consistency check VM-Exit due to invalid guest state and bail. in vmx_vcpu_run()
7113 if (unlikely(vmx->emulation_required)) { in vmx_vcpu_run()
7114 vmx->fail = 0; in vmx_vcpu_run()
7116 vmx->exit_reason.full = EXIT_REASON_INVALID_STATE; in vmx_vcpu_run()
7117 vmx->exit_reason.failed_vmentry = 1; in vmx_vcpu_run()
7119 vmx->exit_qualification = ENTRY_FAIL_DEFAULT; in vmx_vcpu_run()
7121 vmx->exit_intr_info = 0; in vmx_vcpu_run()
7127 if (vmx->ple_window_dirty) { in vmx_vcpu_run()
7128 vmx->ple_window_dirty = false; in vmx_vcpu_run()
7129 vmcs_write32(PLE_WINDOW, vmx->ple_window); in vmx_vcpu_run()
7136 WARN_ON_ONCE(vmx->nested.need_vmcs12_to_shadow_sync); in vmx_vcpu_run()
7139 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]); in vmx_vcpu_run()
7141 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]); in vmx_vcpu_run()
7142 vcpu->arch.regs_dirty = 0; in vmx_vcpu_run()
7146 * prior to VM-Enter, as the kernel may load a new ASID (PCID) any time in vmx_vcpu_run()
7147 * it switches back to the current->mm, which can occur in KVM context in vmx_vcpu_run()
7149 * toggles a static key while handling a VM-Exit. in vmx_vcpu_run()
7152 if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) { in vmx_vcpu_run()
7154 vmx->loaded_vmcs->host_state.cr3 = cr3; in vmx_vcpu_run()
7158 if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) { in vmx_vcpu_run()
7160 vmx->loaded_vmcs->host_state.cr4 = cr4; in vmx_vcpu_run()
7164 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) in vmx_vcpu_run()
7165 set_debugreg(vcpu->arch.dr6, 6); in vmx_vcpu_run()
7167 /* When single-stepping over STI and MOV SS, we must clear the in vmx_vcpu_run()
7172 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) in vmx_vcpu_run()
7193 current_evmcs->hv_clean_fields |= in vmx_vcpu_run()
7196 current_evmcs->hv_vp_id = kvm_hv_get_vpindex(vcpu); in vmx_vcpu_run()
7200 if (vmx->host_debugctlmsr) in vmx_vcpu_run()
7201 update_debugctlmsr(vmx->host_debugctlmsr); in vmx_vcpu_run()
7216 vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; in vmx_vcpu_run()
7227 if (vmx->nested.nested_run_pending && in vmx_vcpu_run()
7228 !vmx->exit_reason.failed_vmentry) in vmx_vcpu_run()
7229 ++vcpu->stat.nested_run; in vmx_vcpu_run()
7231 vmx->nested.nested_run_pending = 0; in vmx_vcpu_run()
7234 vmx->idt_vectoring_info = 0; in vmx_vcpu_run()
7236 if (unlikely(vmx->fail)) { in vmx_vcpu_run()
7237 vmx->exit_reason.full = 0xdead; in vmx_vcpu_run()
7241 vmx->exit_reason.full = vmcs_read32(VM_EXIT_REASON); in vmx_vcpu_run()
7242 if (unlikely((u16)vmx->exit_reason.basic == EXIT_REASON_MCE_DURING_VMENTRY)) in vmx_vcpu_run()
7245 if (likely(!vmx->exit_reason.failed_vmentry)) in vmx_vcpu_run()
7246 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD); in vmx_vcpu_run()
7250 if (unlikely(vmx->exit_reason.failed_vmentry)) in vmx_vcpu_run()
7253 vmx->loaded_vmcs->launched = 1; in vmx_vcpu_run()
7270 free_vpid(vmx->vpid); in vmx_vcpu_free()
7272 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_free()
7284 INIT_LIST_HEAD(&vmx->pi_wakeup_list); in vmx_vcpu_create()
7286 err = -ENOMEM; in vmx_vcpu_create()
7288 vmx->vpid = allocate_vpid(); in vmx_vcpu_create()
7297 vmx->pml_pg = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO); in vmx_vcpu_create()
7298 if (!vmx->pml_pg) in vmx_vcpu_create()
7303 vmx->guest_uret_msrs[i].mask = -1ull; in vmx_vcpu_create()
7312 tsx_ctrl->mask = ~(u64)TSX_CTRL_CPUID_CLEAR; in vmx_vcpu_create()
7315 err = alloc_loaded_vmcs(&vmx->vmcs01); in vmx_vcpu_create()
7320 * Use Hyper-V 'Enlightened MSR Bitmap' feature when KVM runs as a in vmx_vcpu_create()
7321 * nested (L1) hypervisor and Hyper-V in L0 supports it. Enable the in vmx_vcpu_create()
7327 struct hv_enlightened_vmcs *evmcs = (void *)vmx->vmcs01.vmcs; in vmx_vcpu_create()
7329 evmcs->hv_enlightenments_control.msr_bitmap = 1; in vmx_vcpu_create()
7333 bitmap_fill(vmx->shadow_msr_intercept.read, MAX_POSSIBLE_PASSTHROUGH_MSRS); in vmx_vcpu_create()
7334 bitmap_fill(vmx->shadow_msr_intercept.write, MAX_POSSIBLE_PASSTHROUGH_MSRS); in vmx_vcpu_create()
7345 if (kvm_cstate_in_guest(vcpu->kvm)) { in vmx_vcpu_create()
7352 vmx->loaded_vmcs = &vmx->vmcs01; in vmx_vcpu_create()
7355 err = alloc_apic_access_page(vcpu->kvm); in vmx_vcpu_create()
7361 err = init_rmode_identity_map(vcpu->kvm); in vmx_vcpu_create()
7367 WRITE_ONCE(to_kvm_vmx(vcpu->kvm)->pid_table[vcpu->vcpu_id], in vmx_vcpu_create()
7368 __pa(&vmx->pi_desc) | PID_TABLE_ENTRY_VALID); in vmx_vcpu_create()
7373 free_loaded_vmcs(vmx->loaded_vmcs); in vmx_vcpu_create()
7377 free_vpid(vmx->vpid); in vmx_vcpu_create()
7381 …nt and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7382 …tion disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/ad…
7387 kvm->arch.pause_in_guest = true; in vmx_vm_init()
7423 return -EIO; in vmx_check_processor_compat()
7427 return -EIO; in vmx_check_processor_compat()
7433 return -EIO; in vmx_check_processor_compat()
7451 * When there is no need to deal with noncoherent DMA (e.g., no VT-d in vmx_get_mt_mask()
7452 * or VT-d has snoop control), guest CD/MTRR/PAT are all ignored. The in vmx_get_mt_mask()
7463 if (!kvm_arch_has_noncoherent_dma(vcpu->kvm)) in vmx_get_mt_mask()
7467 if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED)) in vmx_get_mt_mask()
7499 * (indicating "allowed-1") if they are supported in the guest's CPUID.
7506 vmx->nested.msrs.cr0_fixed1 = 0xffffffff; in nested_vmx_cr_fixed1_bits_update()
7507 vmx->nested.msrs.cr4_fixed1 = X86_CR4_PCE; in nested_vmx_cr_fixed1_bits_update()
7510 if (entry && (entry->_reg & (_cpuid_mask))) \ in nested_vmx_cr_fixed1_bits_update()
7511 vmx->nested.msrs.cr4_fixed1 |= (_cr4_mask); \ in nested_vmx_cr_fixed1_bits_update()
7525 cr4_fixed1_update(X86_CR4_VMXE, ecx, feature_bit(VMX)); in nested_vmx_cr_fixed1_bits_update()
7526 cr4_fixed1_update(X86_CR4_SMXE, ecx, feature_bit(SMX)); in nested_vmx_cr_fixed1_bits_update()
7527 cr4_fixed1_update(X86_CR4_PCIDE, ecx, feature_bit(PCID)); in nested_vmx_cr_fixed1_bits_update()
7528 cr4_fixed1_update(X86_CR4_OSXSAVE, ecx, feature_bit(XSAVE)); in nested_vmx_cr_fixed1_bits_update()
7534 cr4_fixed1_update(X86_CR4_PKE, ecx, feature_bit(PKU)); in nested_vmx_cr_fixed1_bits_update()
7535 cr4_fixed1_update(X86_CR4_UMIP, ecx, feature_bit(UMIP)); in nested_vmx_cr_fixed1_bits_update()
7536 cr4_fixed1_update(X86_CR4_LA57, ecx, feature_bit(LA57)); in nested_vmx_cr_fixed1_bits_update()
7551 vmx->pt_desc.caps[CPUID_EAX + i*PT_CPUID_REGS_NUM] = best->eax; in update_intel_pt_cfg()
7552 vmx->pt_desc.caps[CPUID_EBX + i*PT_CPUID_REGS_NUM] = best->ebx; in update_intel_pt_cfg()
7553 vmx->pt_desc.caps[CPUID_ECX + i*PT_CPUID_REGS_NUM] = best->ecx; in update_intel_pt_cfg()
7554 vmx->pt_desc.caps[CPUID_EDX + i*PT_CPUID_REGS_NUM] = best->edx; in update_intel_pt_cfg()
7558 vmx->pt_desc.num_address_ranges = intel_pt_validate_cap(vmx->pt_desc.caps, in update_intel_pt_cfg()
7562 vmx->pt_desc.ctl_bitmask = ~(RTIT_CTL_TRACEEN | RTIT_CTL_OS | in update_intel_pt_cfg()
7567 * If CPUID.(EAX=14H,ECX=0):EBX[0]=1 CR3Filter can be set otherwise in update_intel_pt_cfg()
7570 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_cr3_filtering)) in update_intel_pt_cfg()
7571 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_CR3EN; in update_intel_pt_cfg()
7574 * If CPUID.(EAX=14H,ECX=0):EBX[1]=1 CYCEn, CycThresh and in update_intel_pt_cfg()
7577 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_psb_cyc)) in update_intel_pt_cfg()
7578 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_CYCLEACC | in update_intel_pt_cfg()
7582 * If CPUID.(EAX=14H,ECX=0):EBX[3]=1 MTCEn and MTCFreq can be set in update_intel_pt_cfg()
7584 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_mtc)) in update_intel_pt_cfg()
7585 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_MTC_EN | in update_intel_pt_cfg()
7588 /* If CPUID.(EAX=14H,ECX=0):EBX[4]=1 FUPonPTW and PTWEn can be set */ in update_intel_pt_cfg()
7589 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_ptwrite)) in update_intel_pt_cfg()
7590 vmx->pt_desc.ctl_bitmask &= ~(RTIT_CTL_FUP_ON_PTW | in update_intel_pt_cfg()
7593 /* If CPUID.(EAX=14H,ECX=0):EBX[5]=1 PwrEvEn can be set */ in update_intel_pt_cfg()
7594 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_power_event_trace)) in update_intel_pt_cfg()
7595 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_PWR_EVT_EN; in update_intel_pt_cfg()
7597 /* If CPUID.(EAX=14H,ECX=0):ECX[0]=1 ToPA can be set */ in update_intel_pt_cfg()
7598 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_topa_output)) in update_intel_pt_cfg()
7599 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_TOPA; in update_intel_pt_cfg()
7601 /* If CPUID.(EAX=14H,ECX=0):ECX[3]=1 FabricEn can be set */ in update_intel_pt_cfg()
7602 if (intel_pt_validate_cap(vmx->pt_desc.caps, PT_CAP_output_subsys)) in update_intel_pt_cfg()
7603 vmx->pt_desc.ctl_bitmask &= ~RTIT_CTL_FABRIC_EN; in update_intel_pt_cfg()
7606 for (i = 0; i < vmx->pt_desc.num_address_ranges; i++) in update_intel_pt_cfg()
7607 vmx->pt_desc.ctl_bitmask &= ~(0xfULL << (32 + i * 4)); in update_intel_pt_cfg()
7615 vcpu->arch.xsaves_enabled = false; in vmx_vcpu_after_set_cpuid()
7624 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7628 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7657 vmx->msr_ia32_feature_control_valid_bits |= FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7659 vmx->msr_ia32_feature_control_valid_bits &= ~FEAT_CTL_SGX_ENABLED; in vmx_vcpu_after_set_cpuid()
7662 vmx->msr_ia32_feature_control_valid_bits |= in vmx_vcpu_after_set_cpuid()
7665 vmx->msr_ia32_feature_control_valid_bits &= in vmx_vcpu_after_set_cpuid()
7722 to_vmx(vcpu)->req_immediate_exit = true; in vmx_request_immediate_exit()
7733 if (info->intercept == x86_intercept_in || in vmx_check_intercept_io()
7734 info->intercept == x86_intercept_ins) { in vmx_check_intercept_io()
7735 port = info->src_val; in vmx_check_intercept_io()
7736 size = info->dst_bytes; in vmx_check_intercept_io()
7738 port = info->dst_val; in vmx_check_intercept_io()
7739 size = info->src_bytes; in vmx_check_intercept_io()
7743 * If the 'use IO bitmaps' VM-execution control is 0, IO instruction in vmx_check_intercept_io()
7744 * VM-exits depend on the 'unconditional IO exiting' VM-execution in vmx_check_intercept_io()
7747 * Otherwise, IO instruction VM-exits are controlled by the IO bitmaps. in vmx_check_intercept_io()
7766 switch (info->intercept) { in vmx_check_intercept()
7774 exception->vector = UD_VECTOR; in vmx_check_intercept()
7775 exception->error_code_valid = false; in vmx_check_intercept()
7813 u64 low = a << shift, high = a >> (64 - shift); in u64_shl_div_u64()
7832 struct kvm_timer *ktimer = &vcpu->arch.apic->lapic_timer; in vmx_set_hv_timer()
7837 delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl; in vmx_set_hv_timer()
7839 ktimer->timer_advance_ns); in vmx_set_hv_timer()
7842 delta_tsc -= lapic_timer_advance_cycles; in vmx_set_hv_timer()
7847 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio && in vmx_set_hv_timer()
7850 vcpu->arch.l1_tsc_scaling_ratio, &delta_tsc)) in vmx_set_hv_timer()
7851 return -ERANGE; in vmx_set_hv_timer()
7860 return -ERANGE; in vmx_set_hv_timer()
7862 vmx->hv_deadline_tsc = tscl + delta_tsc; in vmx_set_hv_timer()
7869 to_vmx(vcpu)->hv_deadline_tsc = -1; in vmx_cancel_hv_timer()
7875 if (!kvm_pause_in_guest(vcpu->kvm)) in vmx_sched_in()
7884 vmx->nested.update_vmcs01_cpu_dirty_logging = true; in vmx_update_cpu_dirty_logging()
7893 if (vcpu->kvm->arch.cpu_dirty_logging_count) in vmx_update_cpu_dirty_logging()
7901 if (vcpu->arch.mcg_cap & MCG_LMCE_P) in vmx_setup_mce()
7902 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits |= in vmx_setup_mce()
7905 to_vmx(vcpu)->msr_ia32_feature_control_valid_bits &= in vmx_setup_mce()
7912 if (to_vmx(vcpu)->nested.nested_run_pending) in vmx_smi_allowed()
7913 return -EBUSY; in vmx_smi_allowed()
7923 * SMI and RSM. Using the common VM-Exit + VM-Enter routines is wrong in vmx_enter_smm()
7925 * E.g. most MSRs are left untouched, but many are modified by VM-Exit in vmx_enter_smm()
7926 * and VM-Enter, and thus L2's values may be corrupted on SMI+RSM. in vmx_enter_smm()
7928 vmx->nested.smm.guest_mode = is_guest_mode(vcpu); in vmx_enter_smm()
7929 if (vmx->nested.smm.guest_mode) in vmx_enter_smm()
7930 nested_vmx_vmexit(vcpu, -1, 0, 0); in vmx_enter_smm()
7932 vmx->nested.smm.vmxon = vmx->nested.vmxon; in vmx_enter_smm()
7933 vmx->nested.vmxon = false; in vmx_enter_smm()
7943 if (vmx->nested.smm.vmxon) { in vmx_leave_smm()
7944 vmx->nested.vmxon = true; in vmx_leave_smm()
7945 vmx->nested.smm.vmxon = false; in vmx_leave_smm()
7948 if (vmx->nested.smm.guest_mode) { in vmx_leave_smm()
7953 vmx->nested.nested_run_pending = 1; in vmx_leave_smm()
7954 vmx->nested.smm.guest_mode = false; in vmx_leave_smm()
7966 return to_vmx(vcpu)->nested.vmxon && !is_guest_mode(vcpu); in vmx_apic_init_signal_blocked()
7972 struct hrtimer *timer = &to_vmx(vcpu)->nested.preemption_timer; in vmx_migrate_timers()
8005 free_pages((unsigned long)kvm_vmx->pid_table, vmx_get_pid_table_order(kvm)); in vmx_vm_destroy()
8155 (unsigned long *)&vcpu->arch.pmu.global_status); in vmx_handle_intel_pt_intr()
8163 * Though SYSCALL is only supported in 64-bit mode on Intel CPUs, kvm in vmx_setup_user_return_msrs()
8165 * CPUID.0:{EBX,ECX,EDX} is "AuthenticAMD" or "AMDisbetter!" To in vmx_setup_user_return_msrs()
8193 * On pre-MKTME system, boot_cpu_data.x86_phys_bits equals to in vmx_setup_me_spte_mask()
8201 kvm_get_shadow_phys_bits() - 1); in vmx_setup_me_spte_mask()
8224 return -EIO; in hardware_setup()
8255 return -EOPNOTSUPP; in hardware_setup()
8336 * and EPT A/D bit features are enabled -- PML depends on them to work. in hardware_setup()
8348 u64 use_timer_freq = 5000ULL * 1000 * 1000; in hardware_setup()
8354 use_timer_freq = (u64)tsc_khz * 1000; in hardware_setup()
8376 return -EINVAL; in hardware_setup()
8440 * Reset everything to support using non-enlightened VMCS in vmx_exit()
8450 vp_ap->nested_control.features.directhypercall = 0; in vmx_exit()
8451 vp_ap->current_nested_vmcs = 0; in vmx_exit()
8452 vp_ap->enlighten_vmentry = 0; in vmx_exit()
8488 pr_info("KVM: vmx: using Hyper-V Enlightened VMCS\n"); in vmx_init()