4015 	rsvd_check = &vcpu->arch.mmu->shadow_zero_check;  in get_mmio_spte()
4704 	struct rsvd_bits_validate *shadow_zero_check;  in reset_shadow_zero_bits_mask()  local
4709 	shadow_zero_check = &context->shadow_zero_check;  in reset_shadow_zero_bits_mask()
4710 	__reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),  in reset_shadow_zero_bits_mask()
4725 		shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;  in reset_shadow_zero_bits_mask()
4726 		shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;  in reset_shadow_zero_bits_mask()
4727 		shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;  in reset_shadow_zero_bits_mask()
4728 		shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;  in reset_shadow_zero_bits_mask()
4746 	struct rsvd_bits_validate *shadow_zero_check;  in reset_tdp_shadow_zero_bits_mask()  local
4749 	shadow_zero_check = &context->shadow_zero_check;  in reset_tdp_shadow_zero_bits_mask()
4752 		__reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),  in reset_tdp_shadow_zero_bits_mask()
4757 		__reset_rsvds_bits_mask_ept(shadow_zero_check,  in reset_tdp_shadow_zero_bits_mask()
4765 		shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;  in reset_tdp_shadow_zero_bits_mask()
4766 		shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;  in reset_tdp_shadow_zero_bits_mask()
4777 	__reset_rsvds_bits_mask_ept(&context->shadow_zero_check,  in reset_ept_shadow_zero_bits_mask()