Lines Matching +full:- +full:100

1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
25  * is the source clk for a root PLL which outputs 1600 and 100 MHz. It is
31  * clock of 100 MHz plus a quotient which gets us as close to the frequency
33  * For the 83.3 MHz example from above this would give us 100 MHz * 5 / 6 =
80  *  000:   100 *  5 /  6  =  83.3333 MHz
81  *  001:   100 *  1 /  1  = 100.0000 MHz
82  *  010:   100 *  4 /  3  = 133.3333 MHz
83  *  011:   100 *  7 /  6  = 116.6667 MHz
84  *  100:   100 *  4 /  5  =  80.0000 MHz
95  * 0000:   100 *  5 /  6  =  83.3333 MHz
96  * 0001:   100 *  1 /  1  = 100.0000 MHz
97  * 0010:   100 *  4 /  3  = 133.3333 MHz
98  * 0011:   100 *  7 /  6  = 116.6667 MHz
99  * 0100:   100 *  4 /  5  =  80.0000 MHz
100  * 0101:   100 * 14 / 15  =  93.3333 MHz
101  * 0110:   100 *  9 / 10  =  90.0000 MHz
102  * 0111:   100 *  8 /  9  =  88.8889 MHz
103  * 1000:   100 *  7 /  8  =  87.5000 MHz
115  * 0001:   100 *  1 /  1  = 100.0000 MHz
116  * 0010:   100 *  4 /  3  = 133.3333 MHz
126  * 0000:   100 *  5 /  6  =  83.3333 MHz
127  * 0001:   100 *  1 /  1  = 100.0000 MHz
128  * 0010:   100 *  4 /  3  = 133.3333 MHz
129  * 0011:   100 *  1 /  1  = 100.0000 MHz
161  * MSR-based CPU/TSC frequency discovery for certain CPUs.
179 	freq_desc = (struct freq_desc *)id->driver_data;  in cpu_khz_from_msr()
180 	if (freq_desc->use_msr_plat) {  in cpu_khz_from_msr()
190 	index = lo & freq_desc->mask;  in cpu_khz_from_msr()
191 	md = &freq_desc->muldiv[index];  in cpu_khz_from_msr()
197 	if (md->divider) {  in cpu_khz_from_msr()
198 		tscref = TSC_REFERENCE_KHZ * md->multiplier;  in cpu_khz_from_msr()
199 		freq = DIV_ROUND_CLOSEST(tscref, md->divider);  in cpu_khz_from_msr()
204 		res = DIV_ROUND_CLOSEST(tscref * ratio, md->divider);  in cpu_khz_from_msr()
206 		freq = freq_desc->freqs[index];  in cpu_khz_from_msr()