Lines Matching +full:lo +full:- +full:en

1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <asm/processor-flags.h>
50 u32 lo, hi; in k8_check_syscfg_dram_mod_en() local
56 rdmsr(MSR_AMD64_SYSCFG, lo, hi); in k8_check_syscfg_dram_mod_en()
57 if (lo & K8_MTRRFIXRANGE_DRAM_MODIFY) { in k8_check_syscfg_dram_mod_en()
61 lo &= ~K8_MTRRFIXRANGE_DRAM_MODIFY; in k8_check_syscfg_dram_mod_en()
62 mtrr_wrmsr(MSR_AMD64_SYSCFG, lo, hi); in k8_check_syscfg_dram_mod_en()
73 size = -mask; in get_mtrr_size()
79 * Check and return the effective type for MTRR-MTRR type overlap.
106 * mtrr_type_lookup_fixed - look up memory type in MTRR fixed entries
111 * 0x00000 - 0x7FFFF : This range is divided into eight 64KB sub-ranges
112 * 0x80000 - 0xBFFFF : This range is divided into sixteen 16KB sub-ranges
113 * 0xC0000 - 0xFFFFF : This range is divided into sixty-four 4KB sub-ranges
116 * MTRR_TYPE_(type) - Matched memory type
117 * MTRR_TYPE_INVALID - Unmatched
126 /* 0x0 - 0x7FFFF */ in mtrr_type_lookup_fixed()
131 /* 0x80000 - 0xBFFFF */ in mtrr_type_lookup_fixed()
134 idx += ((start - 0x80000) >> 14); in mtrr_type_lookup_fixed()
138 /* 0xC0000 - 0xFFFFF */ in mtrr_type_lookup_fixed()
140 idx += ((start - 0xC0000) >> 12); in mtrr_type_lookup_fixed()
145 * mtrr_type_lookup_variable - look up memory type in MTRR variable entries
148 * MTRR_TYPE_(type) - Matched memory type or default memory type (unmatched)
151 * repeat - Set to 1 when [start:end] spanned across MTRR range and type
155 * uniform - Set to 1 when an MTRR covers the region uniformly, i.e. the
190 * - start_state:1 in mtrr_type_lookup_variable()
192 * - end_state:1 in mtrr_type_lookup_variable()
194 * - inclusive:1 in mtrr_type_lookup_variable()
217 end = *partial_end - 1; /* end is inclusive */ in mtrr_type_lookup_variable()
243 * mtrr_type_lookup - look up memory type in MTRR
246 * MTRR_TYPE_(type) - The effective MTRR type for the region
247 * MTRR_TYPE_INVALID - MTRR is disabled
250 * uniform - Set to 1 when an MTRR covers the region uniformly, i.e. the
261 end--; in mtrr_type_lookup()
317 rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); in get_mtrr_var_range()
318 rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); in get_mtrr_var_range()
365 pr_debug(" %05X-%05X %s\n", last_fixed_start, in print_fixed_last()
366 last_fixed_end - 1, mtrr_attrib_to_str(last_fixed_type)); in print_fixed_last()
413 "en" : "dis"); in print_mtrr_state()
426 mtrr_state.enabled & MTRR_STATE_MTRR_ENABLED ? "en" : "dis"); in print_mtrr_state()
427 high_width = (__ffs64(size_or_mask) - (32 - PAGE_SHIFT) + 3) / 4; in print_mtrr_state()
465 unsigned lo, dummy; in get_mtrr_state() local
470 rdmsr(MSR_MTRRcap, lo, dummy); in get_mtrr_state()
471 mtrr_state.have_fixed = (lo >> 8) & 1; in get_mtrr_state()
478 rdmsr(MSR_MTRRdefType, lo, dummy); in get_mtrr_state()
479 mtrr_state.def_type = (lo & 0xff); in get_mtrr_state()
480 mtrr_state.enabled = (lo & 0xc00) >> 10; in get_mtrr_state()
532 * set_fixed_range - checks & updates a fixed-range MTRR if it
540 unsigned lo, hi; in set_fixed_range() local
542 rdmsr(msr, lo, hi); in set_fixed_range()
544 if (lo != msrwords[0] || hi != msrwords[1]) { in set_fixed_range()
551 * generic_get_free_region - Get a free MTRR.
570 mtrr_if->get(i, &lbase, &lsize, &ltype); in generic_get_free_region()
575 return -ENOSPC; in generic_get_free_region()
604 tmp = (u64)mask_hi << (32 - PAGE_SHIFT) | mask_lo >> PAGE_SHIFT; in generic_get_mtrr()
610 tmp |= ~((1ULL<<(hi - 1)) - 1); in generic_get_mtrr()
623 *size = -mask; in generic_get_mtrr()
624 *base = (u64)base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT; in generic_get_mtrr()
632 * set_fixed_ranges - checks & updates the fixed-range MTRRs if they
634 * @frs: pointer to fixed-range MTRR values, saved by get_fixed_ranges()
640 int block = -1, range; in set_fixed_ranges()
659 unsigned int lo, hi; in set_mtrr_var_ranges() local
662 rdmsr(MTRRphysBase_MSR(index), lo, hi); in set_mtrr_var_ranges()
663 if ((vr->base_lo & 0xfffff0ffUL) != (lo & 0xfffff0ffUL) in set_mtrr_var_ranges()
664 || (vr->base_hi & (size_and_mask >> (32 - PAGE_SHIFT))) != in set_mtrr_var_ranges()
665 (hi & (size_and_mask >> (32 - PAGE_SHIFT)))) { in set_mtrr_var_ranges()
667 mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); in set_mtrr_var_ranges()
671 rdmsr(MTRRphysMask_MSR(index), lo, hi); in set_mtrr_var_ranges()
673 if ((vr->mask_lo & 0xfffff800UL) != (lo & 0xfffff800UL) in set_mtrr_var_ranges()
674 || (vr->mask_hi & (size_and_mask >> (32 - PAGE_SHIFT))) != in set_mtrr_var_ranges()
675 (hi & (size_and_mask >> (32 - PAGE_SHIFT)))) { in set_mtrr_var_ranges()
676 mtrr_wrmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); in set_mtrr_var_ranges()
685 * set_mtrr_state - Set the MTRR state for this CPU.
742 /* Enter the no-fill (CD=1, NW=0) cache mode and flush caches. */ in prepare_set()
747 * Cache flushing is the most time-consuming step when programming in prepare_set()
749 * Manual, we can skip it if the processor supports cache self- in prepare_set()
778 /* Flush TLBs (no need to flush caches - they are disabled) */ in post_set()
821 * generic_set_mtrr - set variable MTRR register on the local CPU.
849 vr->base_lo = base << PAGE_SHIFT | type; in generic_set_mtrr()
850 vr->base_hi = (base & size_and_mask) >> (32 - PAGE_SHIFT); in generic_set_mtrr()
851 vr->mask_lo = -size << PAGE_SHIFT | 0x800; in generic_set_mtrr()
852 vr->mask_hi = (-size & size_and_mask) >> (32 - PAGE_SHIFT); in generic_set_mtrr()
854 mtrr_wrmsr(MTRRphysBase_MSR(reg), vr->base_lo, vr->base_hi); in generic_set_mtrr()
855 mtrr_wrmsr(MTRRphysMask_MSR(reg), vr->mask_lo, vr->mask_hi); in generic_set_mtrr()
869 * must be 4 MiB aligned and not touch 0x70000000 -> 0x7003FFFF in generic_validate_add_page()
874 if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) { in generic_validate_add_page()
876 return -EINVAL; in generic_validate_add_page()
882 return -EINVAL; in generic_validate_add_page()
890 last = base + size - 1; in generic_validate_add_page()
896 return -EINVAL; in generic_validate_add_page()