1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <asm/spec-ctrl.h>
19 #include <asm/pci-direct.h>
37  * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
81  *	and	section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
107 #define CBAR		(0xfffc) /* Configuration Base Address  (32-bit) */  in init_amd_k5()
110 	if (c->x86_model == 9 || c->x86_model == 10) {  in init_amd_k5()
121 	int mbytes = get_num_physpages() >> (20-PAGE_SHIFT);  in init_amd_k6()
123 	if (c->x86_model < 6) {  in init_amd_k6()
124 		/* Based on AMD doc 20734R - June 2000 */  in init_amd_k6()
125 		if (c->x86_model == 0) {  in init_amd_k6()
132 	if (c->x86_model == 6 && c->x86_stepping == 1) {  in init_amd_k6()
138 		pr_info("AMD K6 stepping B detected - ");  in init_amd_k6()
149 		while (n--)  in init_amd_k6()
152 		d = d2-d;  in init_amd_k6()
161 	if (c->x86_model < 8 ||  in init_amd_k6()
162 	   (c->x86_model == 8 && c->x86_stepping < 8)) {  in init_amd_k6()
181 	if ((c->x86_model == 8 && c->x86_stepping > 7) ||  in init_amd_k6()
182 	     c->x86_model == 9 || c->x86_model == 13) {  in init_amd_k6()
203 	if (c->x86_model == 10) {  in init_amd_k6()
221 	if (c->x86_model >= 6 && c->x86_model <= 10) {  in init_amd_k7()
234 	if ((c->x86_model == 8 && c->x86_stepping >= 1) || (c->x86_model > 8)) {  in init_amd_k7()
244 	if (!c->cpu_index)  in init_amd_k7()
252 	if ((c->x86_model == 6) && ((c->x86_stepping == 0) ||  in init_amd_k7()
253 	    (c->x86_stepping == 1)))  in init_amd_k7()
257 	if ((c->x86_model == 7) && (c->x86_stepping == 0))  in init_amd_k7()
264 	 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for  in init_amd_k7()
267 	if (((c->x86_model == 6) && (c->x86_stepping >= 2)) ||  in init_amd_k7()
268 	    ((c->x86_model == 7) && (c->x86_stepping >= 1)) ||  in init_amd_k7()
269 	     (c->x86_model > 7))  in init_amd_k7()
276 	 * Don't taint if we are running SMP kernel on a single non-MP  in init_amd_k7()
294 	for (i = apicid - 1; i >= 0; i--) {  in nearby_node()
309  * Fix up cpu_core_id for pre-F17h systems to be in the
310  * [0 .. cores_per_node - 1] range. Not really needed but
317 	if (c->x86 >= 0x17)  in legacy_fixup_core_id()
320 	cus_per_node = c->x86_max_cores / nodes_per_socket;  in legacy_fixup_core_id()
321 	c->cpu_core_id %= cus_per_node;  in legacy_fixup_core_id()
326  * (1) AMD multi-node processors
334 	/* get information required for multi-node processors */  in amd_get_topology()
337 		u32 eax, ebx, ecx, edx;  in amd_get_topology()  local
339 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);  in amd_get_topology()
341 		c->cpu_die_id  = ecx & 0xff;  in amd_get_topology()
343 		if (c->x86 == 0x15)  in amd_get_topology()
344 			c->cu_id = ebx & 0xff;  in amd_get_topology()
346 		if (c->x86 >= 0x17) {  in amd_get_topology()
347 			c->cpu_core_id = ebx & 0xff;  in amd_get_topology()
350 				c->x86_max_cores /= smp_num_siblings;  in amd_get_topology()
359 			c->x86_coreid_bits = get_count_order(c->x86_max_cores);  in amd_get_topology()
367 		c->cpu_die_id = value & 7;  in amd_get_topology()
369 		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;  in amd_get_topology()
388 	bits = c->x86_coreid_bits;  in amd_detect_cmp()
390 	c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);  in amd_detect_cmp()
392 	c->phys_proc_id = c->initial_apicid >> bits;  in amd_detect_cmp()
394 	per_cpu(cpu_llc_id, cpu) = c->cpu_die_id = c->phys_proc_id;  in amd_detect_cmp()
408 	unsigned apicid = c->apicid;  in srat_detect_node()
415 	 * On multi-fabric platform (e.g. Numascale NumaChip) a  in srat_detect_node()
416 	 * platform-specific handler needs to be called to fixup some  in srat_detect_node()
426 		 * - The CPU is missing memory and no node was created.  In  in srat_detect_node()
429 		 * - The APIC IDs differ from the HyperTransport node IDs  in srat_detect_node()
442 		int ht_nodeid = c->initial_apicid;  in srat_detect_node()
457 	unsigned bits, ecx;  in early_init_amd_mc()  local
460 	if (c->extended_cpuid_level < 0x80000008)  in early_init_amd_mc()
463 	ecx = cpuid_ecx(0x80000008);  in early_init_amd_mc()
465 	c->x86_max_cores = (ecx & 0xff) + 1;  in early_init_amd_mc()
468 	bits = (ecx >> 12) & 0xF;  in early_init_amd_mc()
472 		while ((1 << bits) < c->x86_max_cores)  in early_init_amd_mc()
476 	c->x86_coreid_bits = bits;  in early_init_amd_mc()
484 		if (c->x86 > 0x10 ||  in bsp_init_amd()
485 		    (c->x86 == 0x10 && c->x86_model >= 0x2)) {  in bsp_init_amd()
494 	if (c->x86 == 0x15) {  in bsp_init_amd()
502 		va_align.mask	  = (upperbit - 1) & PAGE_MASK;  in bsp_init_amd()
513 		u32 ecx;  in bsp_init_amd()  local
515 		ecx = cpuid_ecx(0x8000001e);  in bsp_init_amd()
516 		__max_die_per_package = nodes_per_socket = ((ecx >> 8) & 7) + 1;  in bsp_init_amd()
526 	    c->x86 >= 0x15 && c->x86 <= 0x17) {  in bsp_init_amd()
529 		switch (c->x86) {  in bsp_init_amd()
575 		 * will be a value above 32-bits this is still done for  in early_detect_mem_encrypt()
578 		c->x86_phys_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;  in early_detect_mem_encrypt()
607 	if (c->x86 >= 0xf)  in early_init_amd()
610 	rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);  in early_init_amd()
613 	 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate  in early_init_amd()
614 	 * with P/T states and does not stop in deep C-states  in early_init_amd()
616 	if (c->x86_power & (1 << 8)) {  in early_init_amd()
622 	if (c->x86_power & BIT(12))  in early_init_amd()
626 	if (c->x86_power & BIT(14))  in early_init_amd()
633 	if (c->x86 == 5)  in early_init_amd()
634 		if (c->x86_model == 13 || c->x86_model == 9 ||  in early_init_amd()
635 		    (c->x86_model == 8 && c->x86_stepping >= 8))  in early_init_amd()
640 	 * ApicID can always be treated as an 8-bit value for AMD APIC versions  in early_init_amd()
646 		if (c->x86 > 0x16)  in early_init_amd()
648 		else if (c->x86 >= 0xf) {  in early_init_amd()
666 	/* F16h erratum 793, CVE-2013-6885 */  in early_init_amd()
667 	if (c->x86 == 0x16 && c->x86_model <= 0xf)  in early_init_amd()
681 	/* Re-enable TopologyExtensions if switched off by BIOS */  in early_init_amd()
682 	if (c->x86 == 0x15 &&  in early_init_amd()
683 	    (c->x86_model >= 0x10 && c->x86_model <= 0x6f) &&  in early_init_amd()
690 				pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");  in early_init_amd()
714 	if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) {  in init_amd_k8()
722 	if (!c->x86_model_id[0])  in init_amd_k8()
723 		strcpy(c->x86_model_id, "Hammer");  in init_amd_k8()
730 	 * Errata 63 for SH-B3 steppings  in init_amd_k8()
761 	 * degradation for certain nested-paging guests. Prevent this conversion  in init_amd_gh()
787 		return -EINVAL;  in rdrand_cmdline()
792 		return -EINVAL;  in rdrand_cmdline()
809 	 * The self-test can clear X86_FEATURE_RDRAND, so check for  in clear_rdrand_cpuid_bit()
848 	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {  in init_amd_bd()
872 	 * suppresses non-branch predictions.  in init_spectral_chicken()
905 		if (c->x86 == 0x19 && !cpu_has(c, X86_FEATURE_BTC_NO))  in init_amd_zn()
920 	if (c->x86 >= 0x10)  in init_amd()
924 	c->apicid = hard_smp_processor_id();  in init_amd()
927 	if (c->x86 < 6)  in init_amd()
930 	switch (c->x86) {  in init_amd()
948 	if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR)))  in init_amd()
977 	if (c->x86 > 0x11)  in init_amd()
1005 	if (c->x86 == 6) {  in amd_size_cache()
1007 		if (c->x86_model == 3 && c->x86_stepping == 0)  in amd_size_cache()
1010 		if (c->x86_model == 4 &&  in amd_size_cache()
1011 			(c->x86_stepping == 0 || c->x86_stepping == 1))  in amd_size_cache()
1020 	u32 ebx, eax, ecx, edx;  in cpu_detect_tlb_amd()  local
1023 	if (c->x86 < 0xf)  in cpu_detect_tlb_amd()
1026 	if (c->extended_cpuid_level < 0x80000006)  in cpu_detect_tlb_amd()
1029 	cpuid(0x80000006, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1038 	if (c->x86 == 0xf) {  in cpu_detect_tlb_amd()
1039 		cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1055 		if (c->x86 == 0x15 && c->x86_model <= 0x1f) {  in cpu_detect_tlb_amd()
1058 			cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1075 			  [7] = "486 DX/2-WB",
1077 			  [9] = "486 DX/4-WB",
1078 			  [14] = "Am5x86-WT",
1079 			  [15] = "Am5x86-WB"
1100  * variable number of family-specific model-stepping ranges created by
1111 #define AMD_LEGACY_ERRATUM(...)		{ -1, __VA_ARGS__, 0 }
1150 	/* OSVW unavailable or ID unknown, match family-model-stepping range */  in cpu_has_amd_erratum()
1151 	ms = (cpu->x86_model << 4) | cpu->x86_stepping;  in cpu_has_amd_erratum()
1153 		if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&  in cpu_has_amd_erratum()
1173 		wrmsr(MSR_F16H_DR1_ADDR_MASK - 1 + dr, mask, 0);  in set_dr_addr_mask()
1184 	if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) ||  in amd_get_highest_perf()
1185 			       (c->x86_model >= 0x70 && c->x86_model < 0x80)))  in amd_get_highest_perf()
1188 	if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) ||  in amd_get_highest_perf()
1189 			       (c->x86_model >= 0x40 && c->x86_model < 0x70)))  in amd_get_highest_perf()