180 #define R(i, a, b, c, d, e, f, g, h, round, widx, wtype)		\  argument
187 	addl wtype##_W1_ADDR(round, widx), h;				\
193 	addl wtype##_W1W2_ADDR(round, widx), d;				\
214 #define R1(a, b, c, d, e, f, g, h, round, widx, wtype) \  argument
215 	R(1, a, b, c, d, e, f, g, h, round, widx, wtype)
217 #define R2(a, b, c, d, e, f, g, h, round, widx, wtype) \  argument
218 	R(2, a, b, c, d, e, f, g, h, round, widx, wtype)
223 #define IW_W_ADDR(round, widx, offs) \  argument
224 	(STACK_W + ((round) / 4) * 64 + (offs) + ((widx) * 4))(%rsp)
227 #define XW_W_ADDR(round, widx, offs) \  argument
228 	(STACK_W + ((((round) / 3) - 4) % 2) * 64 + (offs) + ((widx) * 4))(%rsp)
231 #define IW_W1_ADDR(round, widx)   IW_W_ADDR(round, widx, 0)  argument
232 #define IW_W1W2_ADDR(round, widx) IW_W_ADDR(round, widx, 32)  argument
235 #define XW_W1_ADDR(round, widx)   XW_W_ADDR(round, widx, 0)  argument
236 #define XW_W1W2_ADDR(round, widx) XW_W_ADDR(round, widx, 32)  argument