Lines Matching +full:4 +full:- +full:ch
2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
59 # Add reg to mem using reg-mem add and store
86 SHUF_00BA = %ymm10 # shuffle xBxA -> 00BA
87 SHUF_DC00 = %ymm12 # shuffle xDxC -> DC00
115 _XFER_SIZE = 2*64*4 # 2 blocks, 64 rounds, 4 bytes/round
160 addl \disp(%rsp, SRND), h # h = k + w + h # --
162 vpalignr $4, X2, X3, XTMP0 # XTMP0 = W[-7]
163 mov f, y2 # y2 = f # CH
167 xor g, y2 # y2 = f^g # CH
168 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]# y1 = (e >> 6)# S1
171 and e, y2 # y2 = (f^g)&e # CH
174 add h, d # d = k + w + h + d # --
177 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15]
181 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
187 add y0, y2 # y2 = S1 + CH # --
188 vpslld $(32-7), XTMP1, XTMP3
190 add y1, h # h = k + w + h + S0 # --
192 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
193 vpor XTMP2, XTMP3, XTMP3 # XTMP3 = W[-15] ror 7
196 add y2, h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
197 add y3, h # h = t1 + S0 + MAJ # --
207 offset = \disp + 1*4
208 addl offset(%rsp, SRND), h # h = k + w + h # --
212 vpsrld $3, XTMP1, XTMP4 # XTMP4 = W[-15] >> 3
213 mov f, y2 # y2 = f # CH
216 xor g, y2 # y2 = f^g # CH
222 and e, y2 # y2 = (f^g)&e # CH
223 add h, d # d = k + w + h + d # --
225 vpslld $(32-18), XTMP1, XTMP1
231 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
233 vpxor XTMP2, XTMP3, XTMP3 # XTMP3 = W[-15] ror 7 ^ W[-15] ror 18
237 add y0, y2 # y2 = S1 + CH # --
240 vpshufd $0b11111010, X3, XTMP2 # XTMP2 = W[-2] {BBAA}
242 add y1, h # h = k + w + h + S0 # --
244 vpaddd XTMP1, XTMP0, XTMP0 # XTMP0 = W[-16] + W[-7] + s0
245 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
246 add y2, h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
247 add y3, h # h = t1 + S0 + MAJ # --
249 vpsrld $10, XTMP2, XTMP4 # XTMP4 = W[-2] >> 10 {BBAA}
258 offset = \disp + 2*4
259 addl offset(%rsp, SRND), h # h = k + w + h # --
261 vpsrlq $19, XTMP2, XTMP3 # XTMP3 = W[-2] ror 19 {xBxA}
264 mov f, y2 # y2 = f # CH
265 xor g, y2 # y2 = f^g # CH
269 vpsrlq $17, XTMP2, XTMP2 # XTMP2 = W[-2] ror 17 {xBxA}
270 and e, y2 # y2 = (f^g)&e # CH
274 add h, d # d = k + w + h + d # --
280 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
290 add y0, y2 # y2 = S1 + CH # --
291 vpshufd $0b01010000, XTMP0, XTMP2 # XTMP2 = W[-2] {DDCC}
294 add y1,h # h = k + w + h + S0 # --
295 add y2,d # d = k + w + h + d + S1 + CH = d + t1 # --
296 add y2,h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
298 add y3,h # h = t1 + S0 + MAJ # --
308 offset = \disp + 3*4
309 addl offset(%rsp, SRND), h # h = k + w + h # --
313 vpsrld $10, XTMP2, XTMP5 # XTMP5 = W[-2] >> 10 {DDCC}
314 mov f, y2 # y2 = f # CH
317 xor g, y2 # y2 = f^g # CH
320 vpsrlq $19, XTMP2, XTMP3 # XTMP3 = W[-2] ror 19 {xDxC}
322 and e, y2 # y2 = (f^g)&e # CH
323 add h, d # d = k + w + h + d # --
326 vpsrlq $17, XTMP2, XTMP2 # XTMP2 = W[-2] ror 17 {xDxC}
328 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
332 add y0, y2 # y2 = S1 + CH # --
336 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
347 add y1, h # h = k + w + h + S0 # --
348 add y2, h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
349 add y3, h # h = t1 + S0 + MAJ # --
358 mov f, y2 # y2 = f # CH
361 xor g, y2 # y2 = f^g # CH
365 and e, y2 # y2 = (f^g)&e # CH
369 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
375 addl \disp(%rsp, SRND), h # h = k + w + h # --
382 add y0, y2 # y2 = S1 + CH # --
385 add h, d # d = k + w + h + d # --
387 add y1, h # h = k + w + h + S0 # --
388 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
394 add y2, old_h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
395 mov f, y2 # y2 = f # CH
398 xor g, y2 # y2 = f^g # CH
402 and e, y2 # y2 = (f^g)&e # CH
403 add y3, old_h # h = t1 + S0 + MAJ # --
407 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
413 offset = 4*1 + \disp
414 addl offset(%rsp, SRND), h # h = k + w + h # --
421 add y0, y2 # y2 = S1 + CH # --
424 add h, d # d = k + w + h + d # --
426 add y1, h # h = k + w + h + S0 # --
428 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
434 add y2, old_h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
435 mov f, y2 # y2 = f # CH
438 xor g, y2 # y2 = f^g # CH
442 and e, y2 # y2 = (f^g)&e # CH
443 add y3, old_h # h = t1 + S0 + MAJ # --
447 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
453 offset = 4*2 + \disp
454 addl offset(%rsp, SRND), h # h = k + w + h # --
461 add y0, y2 # y2 = S1 + CH # --
464 add h, d # d = k + w + h + d # --
466 add y1, h # h = k + w + h + S0 # --
468 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
474 add y2, old_h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
475 mov f, y2 # y2 = f # CH
478 xor g, y2 # y2 = f^g # CH
482 and e, y2 # y2 = (f^g)&e # CH
483 add y3, old_h # h = t1 + S0 + MAJ # --
487 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
493 offset = 4*3 + \disp
494 addl offset(%rsp, SRND), h # h = k + w + h # --
501 add y0, y2 # y2 = S1 + CH # --
504 add h, d # d = k + w + h + d # --
506 add y1, h # h = k + w + h + S0 # --
508 add y2, d # d = k + w + h + d + S1 + CH = d + t1 # --
511 add y2, h # h = k + w + h + S0 + S1 + CH = t1 + S0# --
513 add y3, h # h = t1 + S0 + MAJ # --
538 and $-32, %rsp # align rsp to 32 byte boundary
542 lea -64(INP, NUM_BLKS), NUM_BLKS # pointer to last block
550 mov 4*1(CTX), b
551 mov 4*2(CTX), c
552 mov 4*3(CTX), d
553 mov 4*4(CTX), e
554 mov 4*5(CTX), f
555 mov 4*6(CTX), g
556 mov 4*7(CTX), h
608 add $4*32, SRND
609 cmp $3*4*32, SRND
626 cmp $4*4*32, SRND
632 addm (4*0)(CTX),a
633 addm (4*1)(CTX),b
634 addm (4*2)(CTX),c
635 addm (4*3)(CTX),d
636 addm (4*4)(CTX),e
637 addm (4*5)(CTX),f
638 addm (4*6)(CTX),g
639 addm (4*7)(CTX),h
651 cmp $4*4*32, SRND
658 addm (4*0)(CTX),a
659 addm (4*1)(CTX),b
660 addm (4*2)(CTX),c
661 addm (4*3)(CTX),d
662 addm (4*4)(CTX),e
663 addm (4*5)(CTX),f
664 addm (4*6)(CTX),g
665 addm (4*7)(CTX),h
687 mov (4*0)(CTX),a
688 mov (4*1)(CTX),b
689 mov (4*2)(CTX),c
690 mov (4*3)(CTX),d
691 mov (4*4)(CTX),e
692 mov (4*5)(CTX),f
693 mov (4*6)(CTX),g
694 mov (4*7)(CTX),h
757 # shuffle xBxA -> 00BA
763 # shuffle xDxC -> DC00