Lines Matching full:via
98 * for specific processors or all processors via this register.
110 * may be asserted to specific processors via this register.
121 #define BBC_PSRC_SPG0 0x0001 /* CPU 0 reset via BBC_SPG register */
122 #define BBC_PSRC_SPG1 0x0002 /* CPU 1 reset via BBC_SPG register */
123 #define BBC_PSRC_SPG2 0x0004 /* CPU 2 reset via BBC_SPG register */
124 #define BBC_PSRC_SPG3 0x0008 /* CPU 3 reset via BBC_SPG register */
125 #define BBC_PSRC_SPGSYS 0x0010 /* System reset via BBC_SPG register */
126 #define BBC_PSRC_JTAG 0x0020 /* System reset via JTAG+ */
127 #define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle */
128 #define BBC_PSRC_PWRUP 0x0080 /* System reset via power-up */
139 #define BBC_PSRC_WDT 0x10000 /* System reset via Super I/O watchdog */
140 #define BBC_PSRC_RSC 0x20000 /* System reset via RSC remote monitoring
145 * be determined via this register.
147 #define BBC_XSRC_SXG0 0x01 /* CPU 0 received XIR via Soft_XIR_GEN reg */
148 #define BBC_XSRC_SXG1 0x02 /* CPU 1 received XIR via Soft_XIR_GEN reg */
149 #define BBC_XSRC_SXG2 0x04 /* CPU 2 received XIR via Soft_XIR_GEN reg */
150 #define BBC_XSRC_SXG3 0x08 /* CPU 3 received XIR via Soft_XIR_GEN reg */
151 #define BBC_XSRC_JTAG 0x10 /* All CPUs received XIR via JTAG+ */
220 * is changed via Energy Star.