64 #define REG_W0		(MAX_BPF_JIT_REG + 0)	/* Work register 1 (even) */  macro
68 #define REG_0		REG_W0			/* Register 0 */
95 	[REG_W0]	= 0,
814 		int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;  in bpf_jit_insn()
817 		EMIT4_IMM(0xa7080000, REG_W0, 0);  in bpf_jit_insn()
821 		EMIT4(0xb9970000, REG_W0, src_reg);  in bpf_jit_insn()
831 		int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;  in bpf_jit_insn()
834 		EMIT4_IMM(0xa7090000, REG_W0, 0);  in bpf_jit_insn()
838 		EMIT4(0xb9870000, REG_W0, src_reg);  in bpf_jit_insn()
846 		int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;  in bpf_jit_insn()
857 		EMIT4_IMM(0xa7080000, REG_W0, 0);  in bpf_jit_insn()
862 			EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,  in bpf_jit_insn()
870 			EMIT4(0xb9970000, REG_W0, dst_reg);  in bpf_jit_insn()
881 		int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;  in bpf_jit_insn()
890 		EMIT4_IMM(0xa7090000, REG_W0, 0);  in bpf_jit_insn()
895 			EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,  in bpf_jit_insn()
903 			EMIT4(0xb9870000, REG_W0, dst_reg);  in bpf_jit_insn()
934 			EMIT6_PCREL_RILB(0xc4080000, REG_W0,  in bpf_jit_insn()
938 			EMIT4(0xb9800000, dst_reg, REG_W0);  in bpf_jit_insn()
966 			EMIT6_PCREL_RILB(0xc4080000, REG_W0,  in bpf_jit_insn()
970 			EMIT4(0xb9810000, dst_reg, REG_W0);  in bpf_jit_insn()
1000 			EMIT6_PCREL_RILB(0xc4080000, REG_W0,  in bpf_jit_insn()
1004 			EMIT4(0xb9820000, dst_reg, REG_W0);  in bpf_jit_insn()
1170 		EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);  in bpf_jit_insn()
1172 		EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);  in bpf_jit_insn()
1177 		EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);  in bpf_jit_insn()
1179 		EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);  in bpf_jit_insn()
1184 		EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);  in bpf_jit_insn()
1186 		EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);  in bpf_jit_insn()
1191 		EMIT6_IMM(0xc0010000, REG_W0, imm);  in bpf_jit_insn()
1193 		EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);  in bpf_jit_insn()
1208 		      (insn->imm & BPF_FETCH) ? src_reg : REG_W0,	\  in bpf_jit_insn()
1237 				      is32 ? 0x0058 : 0x0004, REG_W0, REG_0,  in bpf_jit_insn()
1241 				      REG_W0, src_reg, dst_reg, off);  in bpf_jit_insn()
1245 			EMIT4(is32 ? 0xb9160000 : 0xb9040000, src_reg, REG_W0);  in bpf_jit_insn()
1359 		EMIT4_IMM(0xa7080000, REG_W0, 1);  in bpf_jit_insn()
1361 		EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off);  in bpf_jit_insn()