26 		asm volatile("stfpc %0" : "=Q" (state->fpc));  in __kernel_fpu_begin()
31 			asm volatile("std 0,%0" : "=Q" (state->fprs[0]));  in __kernel_fpu_begin()
32 			asm volatile("std 1,%0" : "=Q" (state->fprs[1]));  in __kernel_fpu_begin()
33 			asm volatile("std 2,%0" : "=Q" (state->fprs[2]));  in __kernel_fpu_begin()
34 			asm volatile("std 3,%0" : "=Q" (state->fprs[3]));  in __kernel_fpu_begin()
35 			asm volatile("std 4,%0" : "=Q" (state->fprs[4]));  in __kernel_fpu_begin()
36 			asm volatile("std 5,%0" : "=Q" (state->fprs[5]));  in __kernel_fpu_begin()
37 			asm volatile("std 6,%0" : "=Q" (state->fprs[6]));  in __kernel_fpu_begin()
38 			asm volatile("std 7,%0" : "=Q" (state->fprs[7]));  in __kernel_fpu_begin()
39 			asm volatile("std 8,%0" : "=Q" (state->fprs[8]));  in __kernel_fpu_begin()
40 			asm volatile("std 9,%0" : "=Q" (state->fprs[9]));  in __kernel_fpu_begin()
41 			asm volatile("std 10,%0" : "=Q" (state->fprs[10]));  in __kernel_fpu_begin()
42 			asm volatile("std 11,%0" : "=Q" (state->fprs[11]));  in __kernel_fpu_begin()
43 			asm volatile("std 12,%0" : "=Q" (state->fprs[12]));  in __kernel_fpu_begin()
44 			asm volatile("std 13,%0" : "=Q" (state->fprs[13]));  in __kernel_fpu_begin()
45 			asm volatile("std 14,%0" : "=Q" (state->fprs[14]));  in __kernel_fpu_begin()
46 			asm volatile("std 15,%0" : "=Q" (state->fprs[15]));  in __kernel_fpu_begin()
52 	asm volatile (  in __kernel_fpu_begin()
108 		asm volatile("lfpc %0" : : "Q" (state->fpc));  in __kernel_fpu_end()
113 			asm volatile("ld 0,%0" : : "Q" (state->fprs[0]));  in __kernel_fpu_end()
114 			asm volatile("ld 1,%0" : : "Q" (state->fprs[1]));  in __kernel_fpu_end()
115 			asm volatile("ld 2,%0" : : "Q" (state->fprs[2]));  in __kernel_fpu_end()
116 			asm volatile("ld 3,%0" : : "Q" (state->fprs[3]));  in __kernel_fpu_end()
117 			asm volatile("ld 4,%0" : : "Q" (state->fprs[4]));  in __kernel_fpu_end()
118 			asm volatile("ld 5,%0" : : "Q" (state->fprs[5]));  in __kernel_fpu_end()
119 			asm volatile("ld 6,%0" : : "Q" (state->fprs[6]));  in __kernel_fpu_end()
120 			asm volatile("ld 7,%0" : : "Q" (state->fprs[7]));  in __kernel_fpu_end()
121 			asm volatile("ld 8,%0" : : "Q" (state->fprs[8]));  in __kernel_fpu_end()
122 			asm volatile("ld 9,%0" : : "Q" (state->fprs[9]));  in __kernel_fpu_end()
123 			asm volatile("ld 10,%0" : : "Q" (state->fprs[10]));  in __kernel_fpu_end()
124 			asm volatile("ld 11,%0" : : "Q" (state->fprs[11]));  in __kernel_fpu_end()
125 			asm volatile("ld 12,%0" : : "Q" (state->fprs[12]));  in __kernel_fpu_end()
126 			asm volatile("ld 13,%0" : : "Q" (state->fprs[13]));  in __kernel_fpu_end()
127 			asm volatile("ld 14,%0" : : "Q" (state->fprs[14]));  in __kernel_fpu_end()
128 			asm volatile("ld 15,%0" : : "Q" (state->fprs[15]));  in __kernel_fpu_end()
134 	asm volatile (  in __kernel_fpu_end()
184 	asm volatile("lfpc %0" : : "Q" (state->fpc));  in __load_fpu_regs()
186 		asm volatile("lgr	1,%0\n"  in __load_fpu_regs()
193 		asm volatile("ld 0,%0" : : "Q" (regs[0]));  in __load_fpu_regs()
194 		asm volatile("ld 1,%0" : : "Q" (regs[1]));  in __load_fpu_regs()
195 		asm volatile("ld 2,%0" : : "Q" (regs[2]));  in __load_fpu_regs()
196 		asm volatile("ld 3,%0" : : "Q" (regs[3]));  in __load_fpu_regs()
197 		asm volatile("ld 4,%0" : : "Q" (regs[4]));  in __load_fpu_regs()
198 		asm volatile("ld 5,%0" : : "Q" (regs[5]));  in __load_fpu_regs()
199 		asm volatile("ld 6,%0" : : "Q" (regs[6]));  in __load_fpu_regs()
200 		asm volatile("ld 7,%0" : : "Q" (regs[7]));  in __load_fpu_regs()
201 		asm volatile("ld 8,%0" : : "Q" (regs[8]));  in __load_fpu_regs()
202 		asm volatile("ld 9,%0" : : "Q" (regs[9]));  in __load_fpu_regs()
203 		asm volatile("ld 10,%0" : : "Q" (regs[10]));  in __load_fpu_regs()
204 		asm volatile("ld 11,%0" : : "Q" (regs[11]));  in __load_fpu_regs()
205 		asm volatile("ld 12,%0" : : "Q" (regs[12]));  in __load_fpu_regs()
206 		asm volatile("ld 13,%0" : : "Q" (regs[13]));  in __load_fpu_regs()
207 		asm volatile("ld 14,%0" : : "Q" (regs[14]));  in __load_fpu_regs()
208 		asm volatile("ld 15,%0" : : "Q" (regs[15]));  in __load_fpu_regs()
235 	asm volatile("stfpc %0" : "=Q" (state->fpc));  in save_fpu_regs()
237 		asm volatile("lgr	1,%0\n"  in save_fpu_regs()
244 		asm volatile("std 0,%0" : "=Q" (regs[0]));  in save_fpu_regs()
245 		asm volatile("std 1,%0" : "=Q" (regs[1]));  in save_fpu_regs()
246 		asm volatile("std 2,%0" : "=Q" (regs[2]));  in save_fpu_regs()
247 		asm volatile("std 3,%0" : "=Q" (regs[3]));  in save_fpu_regs()
248 		asm volatile("std 4,%0" : "=Q" (regs[4]));  in save_fpu_regs()
249 		asm volatile("std 5,%0" : "=Q" (regs[5]));  in save_fpu_regs()
250 		asm volatile("std 6,%0" : "=Q" (regs[6]));  in save_fpu_regs()
251 		asm volatile("std 7,%0" : "=Q" (regs[7]));  in save_fpu_regs()
252 		asm volatile("std 8,%0" : "=Q" (regs[8]));  in save_fpu_regs()
253 		asm volatile("std 9,%0" : "=Q" (regs[9]));  in save_fpu_regs()
254 		asm volatile("std 10,%0" : "=Q" (regs[10]));  in save_fpu_regs()
255 		asm volatile("std 11,%0" : "=Q" (regs[11]));  in save_fpu_regs()
256 		asm volatile("std 12,%0" : "=Q" (regs[12]));  in save_fpu_regs()
257 		asm volatile("std 13,%0" : "=Q" (regs[13]));  in save_fpu_regs()
258 		asm volatile("std 14,%0" : "=Q" (regs[14]));  in save_fpu_regs()
259 		asm volatile("std 15,%0" : "=Q" (regs[15]));  in save_fpu_regs()