117 struct zpci_dev {  struct
119 	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */  argument
120 	struct kref kref;
121 	struct hotplug_slot hotplug_slot;
123 	enum zpci_state state;
124 	u32		fid;		/* function ID, used by sclp */
125 	u32		fh;		/* function handle, used by insn's */
126 	u32		gisa;		/* GISA designation for passthrough */
127 	u16		vfn;		/* virtual function number */
128 	u16		pchid;		/* physical channel ID */
129 	u16		maxstbl;	/* Maximum store block size */
130 	u8		pfgid;		/* function group ID */
131 	u8		pft;		/* pci function type */
132 	u8		port;
133 	u8		dtsm;		/* Supported DT mask */
134 	u8		rid_available	: 1;
135 	u8		has_hp_slot	: 1;
136 	u8		has_resources	: 1;
137 	u8		is_physfn	: 1;
138 	u8		util_str_avail	: 1;
139 	u8		irqs_registered	: 1;
140 	u8		reserved	: 2;
141 	unsigned int	devfn;		/* DEVFN part of the RID*/
143 	struct mutex lock;
144 	u8 pfip[CLP_PFIP_NR_SEGMENTS];	/* pci function internal path */
145 	u32 uid;			/* user defined id */
146 	u8 util_str[CLP_UTIL_STR_LEN];	/* utility string */
149 	u64		msi_addr;	/* MSI address */
150 	unsigned int	max_msi;	/* maximum number of MSI's */
151 	unsigned int	msi_first_bit;
152 	unsigned int	msi_nr_irqs;
153 	struct airq_iv *aibv;		/* adapter interrupt bit vector */
154 	unsigned long	aisb;		/* number of the summary bit */
157 	unsigned long	*dma_table;
158 	spinlock_t	dma_table_lock;
159 	int		tlb_refresh;
161 	spinlock_t	iommu_bitmap_lock;
162 	unsigned long	*iommu_bitmap;
163 	unsigned long	*lazy_bitmap;
164 	unsigned long	iommu_size;
165 	unsigned long	iommu_pages;
166 	unsigned int	next_bit;
168 	struct iommu_device iommu_dev;  /* IOMMU core handle */
170 	char res_name[16];
171 	bool mio_capable;
172 	struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
174 	u64		start_dma;	/* Start of available DMA addresses */
198 static inline bool zdev_enabled(struct zpci_dev *zdev)  in zdev_enabled()  argument