1 // SPDX-License-Identifier: GPL-2.0-only
17  * Returns the hart ID of the given device tree node, or -ENODEV if the node
18  * isn't an enabled and valid RISC-V hart node.
20 int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)  in riscv_of_processor_hartid()  argument
26 		return -ENODEV;  in riscv_of_processor_hartid()
29 	*hart = (unsigned long) of_get_cpu_hwid(node, 0);  in riscv_of_processor_hartid()
30 	if (*hart == ~0UL) {  in riscv_of_processor_hartid()
31 		pr_warn("Found CPU without hart ID\n");  in riscv_of_processor_hartid()
32 		return -ENODEV;  in riscv_of_processor_hartid()
36 		pr_info("CPU with hartid=%lu is not available\n", *hart);  in riscv_of_processor_hartid()
37 		return -ENODEV;  in riscv_of_processor_hartid()
41 		pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);  in riscv_of_processor_hartid()
42 		return -ENODEV;  in riscv_of_processor_hartid()
45 		pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);  in riscv_of_processor_hartid()
46 		return -ENODEV;  in riscv_of_processor_hartid()
53  * Find hart ID of the CPU DT node under which given DT node falls.
56  * RISC-V core (HART) node and extract the cpuid from it.
62 	for (; node; node = node->parent) {  in riscv_of_parent_hartid()
70 	return -1;  in riscv_of_parent_hartid()
87 	ci->mvendorid = sbi_spec_is_0_1() ? 0 : sbi_get_mvendorid();  in riscv_cpuinfo_starting()
88 	ci->marchid = sbi_spec_is_0_1() ? 0 : sbi_get_marchid();  in riscv_cpuinfo_starting()
89 	ci->mimpid = sbi_spec_is_0_1() ? 0 : sbi_get_mimpid();  in riscv_cpuinfo_starting()
91 	ci->mvendorid = csr_read(CSR_MVENDORID);  in riscv_cpuinfo_starting()
92 	ci->marchid = csr_read(CSR_MARCHID);  in riscv_cpuinfo_starting()
93 	ci->mimpid = csr_read(CSR_MIMPID);  in riscv_cpuinfo_starting()
95 	ci->mvendorid = 0;  in riscv_cpuinfo_starting()
96 	ci->marchid = 0;  in riscv_cpuinfo_starting()
97 	ci->mimpid = 0;  in riscv_cpuinfo_starting()
124  * Here are the ordering rules of extension naming defined by RISC-V
126  * 1. All extensions should be separated from other multi-letter extensions
132  * 3. Standard supervisor-level extensions (starts with 'S') should be
134  *    supervisor-level extensions are listed, they should be ordered
136  * 4. Non-standard extensions (starts with 'X') must be listed after all
137  *    standard extensions. They must be separated from other multi-letter
155 	arr_sz = ARRAY_SIZE(isa_ext_arr) - 1;  in print_isa_ext()
163 		if (!__riscv_isa_extension_available(NULL, edata->isa_ext_id))  in print_isa_ext()
165 		seq_printf(f, "_%s", edata->uprop);  in print_isa_ext()
185 		if (__riscv_isa_extension_available(NULL, base_riscv_exts[i] - 'a'))  in print_isa()
219 	*pos = cpumask_next(*pos - 1, cpu_online_mask);  in c_start()
237 	unsigned long cpu_id = (unsigned long)v - 1;  in c_show()
243 	seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));  in c_show()
247 	if (!of_property_read_string(node, "compatible", &compat)  in c_show()
250 	seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid);  in c_show()
251 	seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid);  in c_show()
252 	seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid);  in c_show()