Lines Matching full:clkgen
136 clkgen: clock-controller@11800000 { label
137 compatible = "starfive,jh7100-clkgen";
153 clocks = <&clkgen JH7100_CLK_I2C0_CORE>,
154 <&clkgen JH7100_CLK_I2C0_APB>;
166 clocks = <&clkgen JH7100_CLK_I2C1_CORE>,
167 <&clkgen JH7100_CLK_I2C1_APB>;
181 clocks = <&clkgen JH7100_CLK_GPIO_APB>;
193 clocks = <&clkgen JH7100_CLK_UART2_CORE>,
194 <&clkgen JH7100_CLK_UART2_APB>;
206 clocks = <&clkgen JH7100_CLK_UART3_CORE>,
207 <&clkgen JH7100_CLK_UART3_APB>;
219 clocks = <&clkgen JH7100_CLK_I2C2_CORE>,
220 <&clkgen JH7100_CLK_I2C2_APB>;
232 clocks = <&clkgen JH7100_CLK_I2C3_CORE>,
233 <&clkgen JH7100_CLK_I2C3_APB>;