Lines Matching +full:0 +full:x10060000
24 #size-cells = <0>;
25 cpu0: cpu@0 {
31 reg = <0>;
167 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
168 reg = <0x0 0xc000000 0x0 0x4000000>;
169 #address-cells = <0>;
173 <&cpu0_intc 0xffffffff>,
174 <&cpu1_intc 0xffffffff>, <&cpu1_intc 9>,
175 <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>,
176 <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>,
177 <&cpu4_intc 0xffffffff>, <&cpu4_intc 9>;
182 reg = <0x0 0x10000000 0x0 0x1000>;
188 reg = <0x0 0x10010000 0x0 0x1000>;
196 reg = <0x0 0x3000000 0x0 0x8000>;
205 reg = <0x0 0x10011000 0x0 0x1000>;
213 reg = <0x0 0x10030000 0x0 0x1000>;
220 #size-cells = <0>;
225 reg = <0x0 0x10040000 0x0 0x1000>,
226 <0x0 0x20000000 0x0 0x10000000>;
231 #size-cells = <0>;
236 reg = <0x0 0x10041000 0x0 0x1000>,
237 <0x0 0x30000000 0x0 0x10000000>;
242 #size-cells = <0>;
247 reg = <0x0 0x10050000 0x0 0x1000>;
252 #size-cells = <0>;
259 reg = <0x0 0x10090000 0x0 0x2000>,
260 <0x0 0x100a0000 0x0 0x1000>;
266 #size-cells = <0>;
271 reg = <0x0 0x10020000 0x0 0x1000>;
280 reg = <0x0 0x10021000 0x0 0x1000>;
296 reg = <0x0 0x2010000 0x0 0x1000>;
304 reg = <0x0 0x10060000 0x0 0x1000>;